AMD General
Hi Kevin,
Thanks, I checked that patch.
It gates on the UMD profile levels:
case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:
case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK:
case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK:
case AMD_DPM_FORCED_LEVEL_PROFILE_PEAK:
break;
default:
ret = 0;
goto unlock;
in amdgpu_dpm_reapply_umd_profile(), and the same switch in
smu_reapply_performance_level() returns -EINVAL for default.
The reported issue is with power_dpm_force_performance_level set to high, which
is AMD_DPM_FORCED_LEVEL_HIGH,
so it takes the default path. low and manual are the same.
AMD_PP_TASK_COMPLETE_INIT also still passes force_performance_level = false:
case AMD_PP_TASK_COMPLETE_INIT:
ret = smu_adjust_power_state_dynamic(smu, level, true, false);
so the behaviour of the smu_late_init() path is unchanged.
My patch makes that path re-apply the retained level after a reset.
Tested on an SMU 14.0.1 APU with high set: gfxclk 2784MHz before the reset and
2799MHz
after. Without the patch it drops to 600MHz.
Thanks and Regards,
Priya Hosur
-----Original Message-----
From: Wang, Kevin <[email protected]>
Sent: Thursday, October 15, 2026 3:55 PM
To: Hosur, Priya <[email protected]>; [email protected]; Lazar,
Lijo <[email protected]>; Deucher, Alexander <[email protected]>;
Koenig, Christian <[email protected]>; Kuehling, Felix
<[email protected]>
Cc: Vishwakarma, Pratik <[email protected]>; Gopalakrishnan,
Veerabadhran (Veera) <[email protected]>; Hosur, Priya
<[email protected]>
Subject: RE: [PATCH v2 1/1] drm/amd/pm: restore the forced performance level
after a reset
AMD General
>> [PATCH] drm/amd/pm: reapply umd profile state after recovery
Could you please double check this change? It seems it already covers your case
as I see.
Best Regards,
Kevin
> -----Original Message-----
> From: amd-gfx <[email protected]> On Behalf Of
> Hosur, Priya
> Sent: Thursday, October 15, 2026 17:47
> To: [email protected]; Lazar, Lijo <[email protected]>;
> Deucher, Alexander <[email protected]>; Koenig, Christian
> <[email protected]>; Kuehling, Felix <[email protected]>
> Cc: Vishwakarma, Pratik <[email protected]>; Gopalakrishnan,
> Veerabadhran (Veera) <[email protected]>; Hosur,
> Priya <[email protected]>
> Subject: RE: [PATCH v2 1/1] drm/amd/pm: restore the forced performance
> level after a reset
>
> AMD General
>
> Hi Team,
>
> Gentle reminder on this patch.
>
> Lijo, v2 follows your feedback to restore the forced level rather than
> report the default. Could you take a look when you get a chance?
>
> Thanks and Regards,
> Priya
>
> -----Original Message-----
> From: Priya Hosur <[email protected]>
> Sent: Thursday, October 8, 2026 4:10 PM
> To: [email protected]; Deucher, Alexander
> <[email protected]>; Lazar, Lijo <[email protected]>; Koenig,
> Christian <[email protected]>; Kuehling, Felix
> <[email protected]>
> Cc: Hosur, Priya <[email protected]>; Vishwakarma, Pratik
> <[email protected]>; Gopalakrishnan, Veerabadhran (Veera)
> <[email protected]>
> Subject: [PATCH v2 1/1] drm/amd/pm: restore the forced performance
> level after a reset
>
> smu_late_init() re-applies the DPM level after a reset with
>
> smu_handle_task(smu, smu->smu_dpm.dpm_level,
> AMD_PP_TASK_COMPLETE_INIT);
>
> but smu_adjust_power_state_dynamic() only programs the hardware when
>
> if (smu_dpm_ctx->dpm_level != level)
>
> and smu_dpm_ctx is &smu->smu_dpm, so the level is compared against itself.
> The branch is never taken for this caller and
> smu_asic_set_performance_level() is never called.
>
> PMFW is reinitialised by the reset and comes back on its default
> curve, while smu_dpm.dpm_level still holds the level the user forced.
> The device therefore runs at the default level while sysfs keeps
> reporting the forced one. On an SMU 14.0.1 APU gfxclk drops from
> 2.8GHz to 600MHz while sysfs still reports high. Writing the same
> level again does not help either, as
> amdgpu_dpm_force_performance_level() returns early when the requested
> level matches the cached one.
>
> Sync the cached level with the state PMFW came back in before
> re-applying the forced level, so that it is programmed again.
> Suspend/resume is not covered, as PMFW retains its state across s2idle and
> the forced level still applies on resume.
>
> Signed-off-by: Priya Hosur <[email protected]>
> ---
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 15 ++++++++++++---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index a65aa2129845..2d318726c521 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -998,9 +998,18 @@ static int smu_late_init(struct amdgpu_ip_block
> *ip_block)
>
> smu_get_fan_parameters(smu);
>
> - smu_handle_task(smu,
> - smu->smu_dpm.dpm_level,
> - AMD_PP_TASK_COMPLETE_INIT);
> + if (amdgpu_reset_in_recovery(adev)) {
> + enum amd_dpm_forced_level level =
> + smu->smu_dpm.dpm_level;
> +
> + /* PMFW is reinitialised by the reset, so sync the cached
> level
> + * before re-applying the forced one
> + */
> + smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO;
> + smu_handle_task(smu, level, AMD_PP_TASK_COMPLETE_INIT);
> + } else {
> + smu_handle_task(smu, smu->smu_dpm.dpm_level,
> + AMD_PP_TASK_COMPLETE_INIT);
> + }
>
> ret = smu_apply_default_config_table_settings(smu);
> if (ret && (ret != -EOPNOTSUPP)) {
> --
> 2.43.0
