On Fri, Oct 16, 2026 at 9:24 AM Alex Deucher <[email protected]> wrote:
>
> On Fri, Oct 16, 2026 at 6:11 AM Victor Zhao <[email protected]> wrote:
> >
> > [why]
> > GFX12.1 VF timestamp queries need a SMUIO Golden TSC sample, but
> > direct SMUIO MMIO access is restricted on VF.
> >
> > [how]
> > Read the consecutive SMUIO Golden TSC upper and lower registers with
> > amdgpu_mes_rreg64() on GFX12.1 VF. Swap the returned dwords to
> > reconstruct the counter value.
> >
> > v4: use SMUIO Golden TSC for GFX12.1 VF timestamp queries
> >
> > Signed-off-by: Victor Zhao <[email protected]>
> > ---
> > drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 26 ++++++++++++++++++++++++++
> > 1 file changed, 26 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> > b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> > index d6f70d33201a0..93c8f8e449bf4 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> > @@ -37,6 +37,7 @@
> >
> > #include "gc/gc_12_1_0_offset.h"
> > #include "gc/gc_12_1_0_sh_mask.h"
> > +#include "smuio/smuio_15_0_0_offset.h"
> > #include "soc24_enum.h"
> > #include "ivsrcid/gfx/irqsrcs_gfx_12_1_0.h"
> >
> > @@ -3168,10 +3169,35 @@ static int gfx_v12_1_wait_for_idle(struct
> > amdgpu_ip_block *ip_block)
> > return -ETIMEDOUT;
> > }
> >
> > +static uint64_t gfx_v12_1_get_smuio_gpu_clock_counter(struct amdgpu_device
> > *adev)
> > +{
> > + uint64_t clock = 0;
> > + uint32_t reg;
> > +
> > + if (!down_read_trylock(&adev->reset_domain->sem))
> > + return 0;
> > + if (amdgpu_device_skip_hw_access(adev) ||
> > + !adev->mes.ring[0].sched.ready)
> > + goto unlock_reset;
> > +
> > + reg = SOC15_REG_OFFSET(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);
> > + if (amdgpu_mes_rreg64(adev, reg, 0, &clock))
>
> I don't see this function in the current tree. Are you missing a patch?
Nevermind. I see it now. Stupid gmail keeps blackholing mailing list emails.
Alex
>
> Alex
>
> > + goto unlock_reset;
> > +
> > + clock = (clock << 32) | (clock >> 32);
> > +
> > +unlock_reset:
> > + up_read(&adev->reset_domain->sem);
> > + return clock;
> > +}
> > +
> > static uint64_t gfx_v12_1_get_gpu_clock_counter(struct amdgpu_device *adev)
> > {
> > uint64_t clock = 0;
> >
> > + if (amdgpu_sriov_vf(adev))
> > + return gfx_v12_1_get_smuio_gpu_clock_counter(adev);
> > +
> > if (adev->smuio.funcs &&
> > adev->smuio.funcs->get_gpu_clock_counter)
> > clock = adev->smuio.funcs->get_gpu_clock_counter(adev);
> > --
> > 2.50.1
> >
