Am 17.11.2017 um 17:11 schrieb Alex Deucher:
On Thu, Nov 16, 2017 at 5:22 AM, Christian König
<[email protected]> wrote:
Let userspace know how much area we have above the 48bit VA hole on
Vega10.

Signed-off-by: Christian König <[email protected]>
Please add a patch to bump the driver version as well.

I could add one, but actually we don't need one cause the new fields are simply zero initialized by userspace when requestion the device info.

I'm actually considering add a CC stable tag to at least  the first patch, cause when a client actually would try to use this it could confuse the hardware badly.

Christian.

   With that,
this series is:
Reviewed-by: Alex Deucher <[email protected]>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 12 ++++++++++--
  include/uapi/drm/amdgpu_drm.h           |  4 ++++
  2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index e84a7f7f642e..9875d64ae7d5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -550,6 +550,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void 
*data, struct drm_file
         }
         case AMDGPU_INFO_DEV_INFO: {
                 struct drm_amdgpu_info_device dev_info = {};
+               uint64_t vm_size;

                 dev_info.device_id = dev->pdev->device;
                 dev_info.chip_rev = adev->rev_id;
@@ -577,10 +578,17 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void 
*data, struct drm_file
                         dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
                 if (amdgpu_sriov_vf(adev))
                         dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
+
+               vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
                 dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE;
                 dev_info.virtual_address_max =
-                       min(adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE,
-                           AMDGPU_VA_HOLE_START);
+                       min(vm_size, AMDGPU_VA_HOLE_START);
+
+               vm_size -= AMDGPU_VA_RESERVED_SIZE;
+               if (vm_size > AMDGPU_VA_HOLE_START) {
+                       dev_info.high_va_offset = AMDGPU_VA_HOLE_END;
+                       dev_info.high_va_max = AMDGPU_VA_HOLE_END | vm_size;
+               }
                 dev_info.virtual_address_alignment = max((int)PAGE_SIZE, 
AMDGPU_GPU_PAGE_SIZE);
                 dev_info.pte_fragment_size = (1 << 
adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;
                 dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index f7a4cf1b6ef6..1dc8089b480a 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -880,6 +880,10 @@ struct drm_amdgpu_info_device {
         __u32 _pad1;
         /* always on cu bitmap */
         __u32 cu_ao_bitmap[4][4];
+       /** Starting high virtual address for UMDs. */
+       __u64 high_va_offset;
+       /** The maximum high virtual address */
+       __u64 high_va_max;
  };

  struct drm_amdgpu_info_hw_ip {
--
2.11.0

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