[PATCH v2 1/2] drm/amdgpu/gfx11: program the SPM VMID once the RLC runs

[Jesse Zhang]

GFX11 programs the SPM VMID into RLC_SPM_MC_CNTL only in
gfx_v11_0_rlc_init(), which runs during sw_init, before hw_init starts the
RLC. The RLC comes up with the register cleared, and nothing programs it
again after a GPU reset or a resume either. Until commit 38e07c072833
("drm/amdgpu: remove the now-redundant runtime SPM VMID update") the
update on submission covered that up; since then a process which reserved
the VMID for SPM never gets it. GFX9 and GFX10 program it in the RLC
resume instead.

Program it at the end of the RLC resume, which runs on hw_init, GPU reset
and resume, like GFX9 and GFX10 do, and call the gfx function directly
instead of going through the update_spm_vmid() callback.

This doesn't cover GFXOFF, the RLC doesn't save and restore
RLC_SPM_MC_CNTL over it.

v2: new patch, split the init ordering out of the GFXOFF issue

Fixes: 38e07c072833 ("drm/amdgpu: remove the now-redundant runtime SPM VMID 
update")
Signed-off-by: Jesse Zhang <jesse.zh...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index cdf543f1cd9a..cb2c4d0dab87 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -362,6 +362,8 @@ static void gfx_v11_0_ring_invalidate_tlbs(struct 
amdgpu_ring *ring,
                                           bool all_hub, uint8_t dst_sel);
 static void gfx_v11_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id);
 static void gfx_v11_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id);
+static void gfx_v11_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id,
+                                     unsigned int vmid);
 static void gfx_v11_0_userq_priv_fault_work(struct work_struct *work);
 static void gfx_v11_0_update_perf_clk(struct amdgpu_device *adev,
                                      bool enable);
@@ -942,10 +944,6 @@ static int gfx_v11_0_rlc_init(struct amdgpu_device *adev)
                        return r;
        }
 
-       /* init spm vmid with 0xf */
-       if (adev->gfx.rlc.funcs->update_spm_vmid)
-               adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, 
adev->vm_manager.spm_vmid);
-
        return 0;
 }
 
@@ -2582,6 +2580,13 @@ static int gfx_v11_0_rlc_resume(struct amdgpu_device 
*adev)
 
                adev->gfx.rlc.funcs->start(adev);
        }
+
+       /*
+        * The RLC comes up with RLC_SPM_MC_CNTL cleared, program the SPM VMID
+        * once it runs, also after a GPU reset or a resume.
+        */
+       gfx_v11_0_update_spm_vmid(adev, 0, adev->vm_manager.spm_vmid);
+
        return 0;
 }
 
-- 
2.50.1