From: David Belanger <[email protected]> This property is the max possible number of CU for an engine and consider asymmetric configuration.
Signed-off-by: David Belanger <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 6 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 + drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 4 ++++ drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 1 + 4 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index f10560b65f116..9d500e4d01951 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -2168,6 +2168,8 @@ static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->v1.gc_num_wgp0_per_sa) + le32_to_cpu(gc_info->v1.gc_num_wgp1_per_sa)); adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); + adev->gfx.config.max_cu_per_se = + adev->gfx.config.max_sh_per_se * adev->gfx.config.max_cu_per_sh; adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v1.gc_num_gl2c); adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v1.gc_num_gprs); @@ -2208,6 +2210,7 @@ static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) le32_to_cpu(gc_info->v1_4.gc_num_twgp1_per_sa1); adev->gfx.config.max_cu_per_sh = 2 * (num_wgps_per_sa >= num_wgps_per_sa1 ? num_wgps_per_sa : num_wgps_per_sa1); + adev->gfx.config.max_cu_per_se = 2 * (num_wgps_per_sa + num_wgps_per_sa1); } else if (le16_to_cpu(gc_info->v1.header.version_minor) >= 3) { adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v1_3.gc_tcp_size_per_cu); adev->gfx.config.gc_tcp_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcp_cache_line_size); @@ -2229,12 +2232,15 @@ static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) le32_to_cpu(gc_info->v1_5.gc_num_wgp1_per_sa1); adev->gfx.config.max_cu_per_sh = num_wgps_per_sa >= num_wgps_per_sa1 ? num_wgps_per_sa : num_wgps_per_sa1; + adev->gfx.config.max_cu_per_se = 2 * (num_wgps_per_sa + num_wgps_per_sa1); } break; case 2: adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se); adev->gfx.config.max_cu_per_sh = le32_to_cpu(gc_info->v2.gc_num_cu_per_sh); adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v2.gc_num_sh_per_se); + adev->gfx.config.max_cu_per_se = + adev->gfx.config.max_sh_per_se * adev->gfx.config.max_cu_per_sh; adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v2.gc_num_rb_per_se); adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v2.gc_num_tccs); adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v2.gc_num_gprs); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index 5939e1fb3b241..e4458b5e35380 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h @@ -238,6 +238,7 @@ struct amdgpu_gfx_config { unsigned max_tile_pipes; unsigned max_cu_per_sh; unsigned max_sh_per_se; + unsigned max_cu_per_se; unsigned max_backends_per_se; unsigned max_texture_channel_caches; unsigned max_gprs; diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c index 1ef4d26a0ac69..af0c161c520dd 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c @@ -466,6 +466,8 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr, dev->node_props.cu_per_simd_array); sysfs_show_32bit_prop(buffer, offs, "simd_per_cu", dev->node_props.simd_per_cu); + sysfs_show_32bit_prop(buffer, offs, "max_cu_per_engine", + dev->node_props.max_cu_per_engine); sysfs_show_32bit_prop(buffer, offs, "max_slots_scratch_cu", dev->node_props.max_slots_scratch_cu); sysfs_show_32bit_prop(buffer, offs, "gfx_target_version", @@ -2100,6 +2102,8 @@ int kfd_topology_add_device(struct kfd_node *gpu) dev->node_props.simd_arrays_per_engine = gfx_info->max_sh_per_se; + dev->node_props.max_cu_per_engine = gpu->adev->gfx.config.max_cu_per_se; + dev->node_props.gfx_target_version = gpu->kfd->device_info.gfx_target_version; dev->node_props.vendor_id = gpu->adev->pdev->vendor; diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.h b/drivers/gpu/drm/amd/amdkfd/kfd_topology.h index ad63ba67b5774..0f29da44c45ae 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.h @@ -62,6 +62,7 @@ struct kfd_node_properties { uint32_t simd_arrays_per_engine; uint32_t cu_per_simd_array; uint32_t simd_per_cu; + uint32_t max_cu_per_engine; uint32_t max_slots_scratch_cu; uint32_t engine_id; uint32_t gfx_target_version; -- 2.56.0
