Most likely just a leftover from bringup.

Signed-off-by: Christian König <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 
b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index 4c19c96a8e59..b0dbc17c5648 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
@@ -1310,11 +1310,6 @@ static void uvd_v7_0_ring_emit_vm_flush(struct 
amdgpu_ring *ring,
        data1 = lower_32_bits(pd_addr);
        uvd_v7_0_vm_reg_write(ring, data0, data1);
 
-       data0 = (hub->ctx0_ptb_addr_lo32 + vmid * 2) << 2;
-       data1 = lower_32_bits(pd_addr);
-       mask = 0xffffffff;
-       uvd_v7_0_vm_reg_wait(ring, data0, data1, mask);
-
        /* flush TLB */
        data0 = (hub->vm_inv_eng0_req + eng) << 2;
        data1 = req;
@@ -1361,11 +1356,6 @@ static void uvd_v7_0_enc_ring_emit_vm_flush(struct 
amdgpu_ring *ring,
        amdgpu_ring_write(ring, (hub->ctx0_ptb_addr_lo32 + vmid * 2) << 2);
        amdgpu_ring_write(ring, lower_32_bits(pd_addr));
 
-       amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WAIT);
-       amdgpu_ring_write(ring, (hub->ctx0_ptb_addr_lo32 + vmid * 2) << 2);
-       amdgpu_ring_write(ring, 0xffffffff);
-       amdgpu_ring_write(ring, lower_32_bits(pd_addr));
-
        /* flush TLB */
        amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WRITE);
        amdgpu_ring_write(ring, (hub->vm_inv_eng0_req + eng) << 2);
@@ -1714,7 +1704,7 @@ static const struct amdgpu_ring_funcs 
uvd_v7_0_ring_vm_funcs = {
        .emit_frame_size =
                2 + /* uvd_v7_0_ring_emit_hdp_flush */
                2 + /* uvd_v7_0_ring_emit_hdp_invalidate */
-               34 + /* uvd_v7_0_ring_emit_vm_flush */
+               26 + /* uvd_v7_0_ring_emit_vm_flush */
                14 + 14, /* uvd_v7_0_ring_emit_fence x2 vm fence */
        .emit_ib_size = 8, /* uvd_v7_0_ring_emit_ib */
        .emit_ib = uvd_v7_0_ring_emit_ib,
@@ -1740,7 +1730,7 @@ static const struct amdgpu_ring_funcs 
uvd_v7_0_enc_ring_vm_funcs = {
        .get_wptr = uvd_v7_0_enc_ring_get_wptr,
        .set_wptr = uvd_v7_0_enc_ring_set_wptr,
        .emit_frame_size =
-               17 + /* uvd_v7_0_enc_ring_emit_vm_flush */
+               13 + /* uvd_v7_0_enc_ring_emit_vm_flush */
                5 + 5 + /* uvd_v7_0_enc_ring_emit_fence x2 vm fence */
                1, /* uvd_v7_0_enc_ring_insert_end */
        .emit_ib_size = 5, /* uvd_v7_0_enc_ring_emit_ib */
-- 
2.14.1

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