>-----Original Message-----
>From: amd-gfx [mailto:[email protected]] On Behalf Of Rex
>Zhu
>Sent: Tuesday, January 16, 2018 7:47 PM
>To: [email protected]
>Cc: Zhu, Rex <[email protected]>
>Subject: [PATCH v2] drm/amdgpu: reserved requested gtt buffer for smu
>
>v2: merge tip drm-next code.
> simplify check smu_memory_size code.
> simplify allocate smu memroy code.
>
>Change-Id: Ie8e865cc7d6c9d60fe234f29ac07e9f9fae60e9f
>Signed-off-by: Rex Zhu <[email protected]>
>---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 43
>+++++++++++++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 6 ++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 39
>++++++++++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
> 8 files changed, 94 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>index cd3af51..46cd14c 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>@@ -128,6 +128,7 @@
> extern int amdgpu_lbpw;
> extern int amdgpu_compute_multipipe;
> extern int amdgpu_gpu_recovery;
>+extern uint amdgpu_smu_memory_pool_size;
>
> #ifdef CONFIG_DRM_AMDGPU_SI
> extern int amdgpu_si_support;
>@@ -1418,6 +1419,7 @@ enum amd_hw_ip_block_type {
> struct amd_powerplay {
> struct cgs_device *cgs_device;
> void *pp_handle;
>+ struct amdgpu_bo *smu_prv_buffer; /* used for SMU debug */
> const struct amd_ip_funcs *ip_funcs;
> const struct amd_pm_funcs *pp_funcs;
> };
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>index d09c4ee..f0b112c 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>@@ -773,6 +773,46 @@ static void amdgpu_device_check_vm_size(struct
>amdgpu_device *adev)
> }
> }
>
>+static void amdgpu_device_check_smu_prv_buffer_size(struct amdgpu_device
>*adev)
>+{
>+ struct sysinfo si;
>+ bool is_os_64 = (sizeof(void *) == 8) ? true : false;
>+ uint64_t total_memory;
>+ uint64_t dram_size_seven_GB = 0x1B8000000;
>+ uint64_t dram_size_three_GB = 0xB8000000;
>+
>+ if (amdgpu_smu_memory_pool_size == 0)
>+ return;
>+
>+ if (!is_os_64) {
>+ DRM_WARN("Not 64-bit OS, feature not supported\n");
>+ goto def_value;
>+ }
>+ si_meminfo(&si);
>+ total_memory = (uint64_t)si.totalram * si.mem_unit;
>+
>+ if ((amdgpu_smu_memory_pool_size == 1) ||
>+ (amdgpu_smu_memory_pool_size == 2)) {
>+ if (total_memory < dram_size_three_GB)
>+ goto def_value1;
>+ } else if ((amdgpu_smu_memory_pool_size == 4) ||
>+ (amdgpu_smu_memory_pool_size == 8)) {
>+ if (total_memory < dram_size_seven_GB)
>+ goto def_value1;
>+ } else {
>+ DRM_WARN("Smu memory pool size not supported\n");
>+ goto def_value;
>+ }
>+ amdgpu_smu_memory_pool_size = amdgpu_smu_memory_pool_size << 28;
>+
>+ return;
>+
>+def_value1:
>+ DRM_WARN("No enough system memory\n");
>+def_value:
>+ amdgpu_smu_memory_pool_size = 0;
>+}
>+
> /**
> * amdgpu_device_check_arguments - validate module params
> *
>@@ -814,6 +854,8 @@ static void amdgpu_device_check_arguments(struct
>amdgpu_device *adev)
> amdgpu_vm_fragment_size = -1;
> }
>
>+ amdgpu_device_check_smu_prv_buffer_size(adev);
>+
> amdgpu_device_check_vm_size(adev);
>
> amdgpu_device_check_block_size(adev);
>@@ -2073,6 +2115,7 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
> release_firmware(adev->firmware.gpu_info_fw);
> adev->firmware.gpu_info_fw = NULL;
> }
>+
> adev->accel_working = false;
> cancel_delayed_work_sync(&adev->late_init_work);
> /* free i2c buses */
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>index 0bb34db..e679bb8 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>@@ -130,6 +130,7 @@
> int amdgpu_lbpw = -1;
> int amdgpu_compute_multipipe = -1;
> int amdgpu_gpu_recovery = -1; /* auto */
>+uint amdgpu_smu_memory_pool_size = 0;
>
> MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
> module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
>@@ -311,6 +312,11 @@
> module_param_named(cik_support, amdgpu_cik_support, int, 0444);
> #endif
>
>+MODULE_PARM_DESC(smu_memory_pool_size,
>+ "reserve gtt for smu debug usage, 0 = disable,"
>+ "0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte");
>+module_param_named(smu_memory_pool_size, amdgpu_smu_memory_pool_size, uint,
>0444);
>+
> static const struct pci_device_id pciidlist[] = {
> #ifdef CONFIG_DRM_AMDGPU_SI
> {0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
>index 5f5aa5f..7d9c330 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
>@@ -101,6 +101,37 @@ static int amdgpu_pp_early_init(void *handle)
> return ret;
> }
>
>+static void amdgpu_pp_alloc_mem_for_smu(struct amdgpu_device *adev)
>+{
>+ int r = -EINVAL;
>+ void *cpu_ptr = NULL;
>+ uint64_t gpu_addr;
>+
>+ if (amdgpu_bo_create_kernel(adev, amdgpu_smu_memory_pool_size,
>+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
>+ &adev->powerplay.smu_prv_buffer,
>+ &gpu_addr,
>+ &cpu_ptr)) {
>+ DRM_ERROR("amdgpu: failed to create smu prv buffer (%d).\n", r);
>+ return;
>+ }
>+
>+ if (adev->powerplay.pp_funcs->notify_smu_memory_info)
>+ r = amdgpu_dpm_notify_smu_memory_info(adev,
>+ lower_32_bits((unsigned long)cpu_ptr),
>+ upper_32_bits((unsigned long)cpu_ptr),
>+ lower_32_bits(gpu_addr),
>+ upper_32_bits(gpu_addr),
>+ amdgpu_smu_memory_pool_size);
>+
>+ if (r) {
[Evan] If notify_smu_memory_info is not defined, it will also fall into this
statement. Is this desired?
>+ amdgpu_bo_free_kernel(&adev->powerplay.smu_prv_buffer, NULL,
>NULL);
>+ adev->powerplay.smu_prv_buffer = NULL;
>+ DRM_ERROR("amdgpu: failed to notify SMU buffer address.\n");
>+ }
>+
>+ return;
>+}
>
> static int amdgpu_pp_late_init(void *handle)
> {
>@@ -111,6 +142,9 @@ static int amdgpu_pp_late_init(void *handle)
> ret = adev->powerplay.ip_funcs->late_init(
> adev->powerplay.pp_handle);
>
>+ if (amdgpu_smu_memory_pool_size)
>+ amdgpu_pp_alloc_mem_for_smu(adev);
>+
> return ret;
> }
>
>@@ -180,6 +214,11 @@ static void amdgpu_pp_late_fini(void *handle)
>
> if (adev->powerplay.cgs_device)
> amdgpu_cgs_destroy_device(adev->powerplay.cgs_device);
>+
>+ if (adev->powerplay.smu_prv_buffer) {
>+ amdgpu_bo_free_kernel(&adev->powerplay.smu_prv_buffer, NULL,
>NULL);
>+ adev->powerplay.smu_prv_buffer = NULL;
>+ }
> }
>
> static int amdgpu_pp_suspend(void *handle)
>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
>b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
>index 709b167..bcb4603 100644
>--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
>+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
>@@ -350,6 +350,7 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
> } else {
> adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;
> }
>+ adev->gmc.gart_size += amdgpu_smu_memory_pool_size;
>
> gmc_v6_0_vram_gtt_location(adev, &adev->gmc);
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>index fba7aae..0090bb7 100644
>--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>@@ -407,7 +407,7 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
> } else {
> adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;
> }
>-
>+ adev->gmc.gart_size += amdgpu_smu_memory_pool_size;
> gmc_v7_0_vram_gtt_location(adev, &adev->gmc);
>
> return 0;
>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
>b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
>index c614657..ee65ad7 100644
>--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
>+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
>@@ -583,6 +583,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
> adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;
> }
>
>+ adev->gmc.gart_size += amdgpu_smu_memory_pool_size;
> gmc_v8_0_vram_gtt_location(adev, &adev->gmc);
>
> return 0;
>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>index b7e3a4d..2f7bc9e 100644
>--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>@@ -745,7 +745,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
> } else {
> adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;
> }
>-
>+ adev->gmc.gart_size += amdgpu_smu_memory_pool_size;
> gmc_v9_0_vram_gtt_location(adev, &adev->gmc);
>
> return 0;
>--
>1.9.1
>
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