Instead of repeating this multiple times.
Signed-off-by: Christian König <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index e4d209b5c879..530d2ea1b73c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -7147,12 +7147,12 @@ static void gfx_v8_0_ring_emit_ce_meta(struct
amdgpu_ring *ring)
} ce_payload = {};
if (ring->adev->virt.chained_ib_support) {
- ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 +
- offsetof(struct
vi_gfx_meta_data_chained_ib, ce_payload);
+ ce_payload_addr = AMDGPU_CSA_VADDR +
+ offsetof(struct vi_gfx_meta_data_chained_ib,
ce_payload);
cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2;
} else {
- ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 +
- offsetof(struct
vi_gfx_meta_data, ce_payload);
+ ce_payload_addr = AMDGPU_CSA_VADDR +
+ offsetof(struct vi_gfx_meta_data, ce_payload);
cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2;
}
@@ -7175,7 +7175,7 @@ static void gfx_v8_0_ring_emit_de_meta(struct amdgpu_ring
*ring)
struct vi_de_ib_state_chained_ib chained;
} de_payload = {};
- csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
+ csa_addr = AMDGPU_CSA_VADDR;
gds_addr = csa_addr + 4096;
if (ring->adev->virt.chained_ib_support) {
de_payload.chained.gds_backup_addrlo = lower_32_bits(gds_addr);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index afdf57206efa..720d15f1324e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3873,7 +3873,7 @@ static void gfx_v9_0_ring_emit_ce_meta(struct amdgpu_ring
*ring)
int cnt;
cnt = (sizeof(ce_payload) >> 2) + 4 - 2;
- csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
+ csa_addr = AMDGPU_CSA_VADDR;
amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));
amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
@@ -3891,7 +3891,7 @@ static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring
*ring)
uint64_t csa_addr, gds_addr;
int cnt;
- csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
+ csa_addr = AMDGPU_CSA_VADDR;
gds_addr = csa_addr + 4096;
de_payload.gds_backup_addrlo = lower_32_bits(gds_addr);
de_payload.gds_backup_addrhi = upper_32_bits(gds_addr);
--
2.14.1
_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
