[PATCH 7/9] drm/amdgpu: program AGP aperture as frame buffer when ZFB is enabled

[Feifei Xu]

From: Hawking Zhang <hawking.zh...@amd.com>

Change-Id: I32e6321da74a1bd87f13adbe8e7738023738e6d5
Signed-off-by: Hawking Zhang <hawking.zh...@amd.com>
Acked-by: John Bridgman <john.bridg...@amd.com>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Feifei Xu <feifei...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 19 +++++++++++++++----
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 19 +++++++++++++++----
 2 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index f716d65..f7e616b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -74,10 +74,21 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct 
amdgpu_device *adev)
 {
        uint64_t value;
 
-       /* Disable AGP. */
-       WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFFFF);
+       if (adev->gmc.enable_zfb) {
+               /* Disable LFB */
+               WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_TOP, 0);
+               WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);
+
+               /* Enable AGP */
+               WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, adev->gmc.zfb_phys_addr 
>> 24);
+               WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.vram_end >> 24);
+               WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.vram_start >> 
24);
+       } else {
+               /* Disable AGP. */
+               WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, 0);
+               WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);
+               WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFFFF);
+       }
 
        /* Program the system aperture low logical page number. */
        WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index c3e3a35..b539fd1 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -82,10 +82,21 @@ static void mmhub_v1_0_init_system_aperture_regs(struct 
amdgpu_device *adev)
        uint64_t value;
        uint32_t tmp;
 
-       /* Disable AGP. */
-       WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, 0x00FFFFFF);
+       if (adev->gmc.enable_zfb) {
+               /* Disable LFB */
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_TOP, 0);
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);
+
+               /* Enable AGP */
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 
adev->gmc.zfb_phys_addr >> 24);
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.vram_end >> 
24);
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.vram_start >> 
24);
+       } else {
+               /* Disable AGP. */
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0);
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, 0);
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, 0x00FFFFFF);
+       }
 
        /* Program the system aperture low logical page number. */
        WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
-- 
2.7.4

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