Change-Id: Iadd754d57ec8e7bd5ce46bba97664b1c4932e395
Signed-off-by: Harry Wentland <harry.wentl...@amd.com>
Reviewed-by: Tony Cheng <tony.ch...@amd.com>
Acked-by: Harry Wentland <harry.wentl...@amd.com>
---
 .../amd/display/dc/dce80/dce80_timing_generator.c  | 125 +++++++++++----------
 .../amd/display/dc/dce80/dce80_timing_generator.h  |   6 -
 2 files changed, 63 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 
b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c
index 265894851493..2934650e0434 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c
@@ -84,7 +84,7 @@ static const struct dce110_timing_generator_offsets 
reg_offsets[] = {
 #define DCP_REG(reg) (reg + tg110->offsets.dcp)
 #define DMIF_REG(reg) (reg + tg110->offsets.dmif)
 
-void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_khz)
+static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_khz)
 {
        uint64_t pix_dur;
        uint32_t addr = mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1
@@ -115,6 +115,68 @@ static void program_timing(struct timing_generator *tg,
        dce110_tg_program_timing(tg, timing, use_vbios);
 }
 
+static void dce80_timing_generator_enable_advanced_request(
+       struct timing_generator *tg,
+       bool enable,
+       const struct dc_crtc_timing *timing)
+{
+       struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg);
+       uint32_t addr = CRTC_REG(mmCRTC_START_LINE_CONTROL);
+       uint32_t value = dm_read_reg(tg->ctx, addr);
+
+       if (enable) {
+               set_reg_field_value(
+                       value,
+                       0,
+                       CRTC_START_LINE_CONTROL,
+                       CRTC_LEGACY_REQUESTOR_EN);
+       } else {
+               set_reg_field_value(
+                       value,
+                       1,
+                       CRTC_START_LINE_CONTROL,
+                       CRTC_LEGACY_REQUESTOR_EN);
+       }
+
+       if ((timing->v_sync_width + timing->v_front_porch) <= 3) {
+               set_reg_field_value(
+                       value,
+                       3,
+                       CRTC_START_LINE_CONTROL,
+                       CRTC_ADVANCED_START_LINE_POSITION);
+               set_reg_field_value(
+                       value,
+                       0,
+                       CRTC_START_LINE_CONTROL,
+                       CRTC_PREFETCH_EN);
+       } else {
+               set_reg_field_value(
+                       value,
+                       4,
+                       CRTC_START_LINE_CONTROL,
+                       CRTC_ADVANCED_START_LINE_POSITION);
+               set_reg_field_value(
+                       value,
+                       1,
+                       CRTC_START_LINE_CONTROL,
+                       CRTC_PREFETCH_EN);
+       }
+
+       set_reg_field_value(
+               value,
+               1,
+               CRTC_START_LINE_CONTROL,
+               CRTC_PROGRESSIVE_START_LINE_EARLY);
+
+       set_reg_field_value(
+               value,
+               1,
+               CRTC_START_LINE_CONTROL,
+               CRTC_INTERLACE_START_LINE_EARLY);
+
+       dm_write_reg(tg->ctx, addr, value);
+}
+
 static const struct timing_generator_funcs dce80_tg_funcs = {
                .validate_timing = dce110_tg_validate_timing,
                .program_timing = program_timing,
@@ -176,64 +238,3 @@ void dce80_timing_generator_construct(
        tg110->min_h_back_porch = 4;
 }
 
-void dce80_timing_generator_enable_advanced_request(
-       struct timing_generator *tg,
-       bool enable,
-       const struct dc_crtc_timing *timing)
-{
-       struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg);
-       uint32_t addr = CRTC_REG(mmCRTC_START_LINE_CONTROL);
-       uint32_t value = dm_read_reg(tg->ctx, addr);
-
-       if (enable) {
-               set_reg_field_value(
-                       value,
-                       0,
-                       CRTC_START_LINE_CONTROL,
-                       CRTC_LEGACY_REQUESTOR_EN);
-       } else {
-               set_reg_field_value(
-                       value,
-                       1,
-                       CRTC_START_LINE_CONTROL,
-                       CRTC_LEGACY_REQUESTOR_EN);
-       }
-
-       if ((timing->v_sync_width + timing->v_front_porch) <= 3) {
-               set_reg_field_value(
-                       value,
-                       3,
-                       CRTC_START_LINE_CONTROL,
-                       CRTC_ADVANCED_START_LINE_POSITION);
-               set_reg_field_value(
-                       value,
-                       0,
-                       CRTC_START_LINE_CONTROL,
-                       CRTC_PREFETCH_EN);
-       } else {
-               set_reg_field_value(
-                       value,
-                       4,
-                       CRTC_START_LINE_CONTROL,
-                       CRTC_ADVANCED_START_LINE_POSITION);
-               set_reg_field_value(
-                       value,
-                       1,
-                       CRTC_START_LINE_CONTROL,
-                       CRTC_PREFETCH_EN);
-       }
-
-       set_reg_field_value(
-               value,
-               1,
-               CRTC_START_LINE_CONTROL,
-               CRTC_PROGRESSIVE_START_LINE_EARLY);
-
-       set_reg_field_value(
-               value,
-               1,
-               CRTC_START_LINE_CONTROL,
-               CRTC_INTERLACE_START_LINE_EARLY);
-
-       dm_write_reg(tg->ctx, addr, value);
-}
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.h 
b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.h
index 9cebb24c94c8..8ff1b06bcd8b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.h
@@ -36,10 +36,4 @@ void dce80_timing_generator_construct(
        uint32_t instance,
        const struct dce110_timing_generator_offsets *offsets);
 
-/******** HW programming ************/
-void dce80_timing_generator_enable_advanced_request(
-       struct timing_generator *tg,
-       bool enable,
-       const struct dc_crtc_timing *timing);
-
 #endif /* __DC_TIMING_GENERATOR_DCE80_H__ */
-- 
2.14.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to