For compute workload, fix sclk in highest two levels can get better
performance on smu7.
user still can change sclk range through sysfs pp_dpm_sclk/mclk.

Change-Id: I460f6bb1f94fd5f5d2d653dd1896696b7744bebf
Signed-off-by: Rex Zhu <rex....@amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index fa32839..a31d1a8 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -5025,6 +5025,26 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr 
*hwmgr, char *buf)
        return size;
 }
 
+static void smu7_patch_compute_profile_mode(struct pp_hwmgr *hwmgr,
+                                       enum PP_SMC_POWER_PROFILE requst)
+{
+       struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
+       uint32_t tmp, level;
+
+       if (requst == PP_SMC_POWER_PROFILE_COMPUTE) {
+               if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) {
+                       level = 0;
+                       tmp = data->dpm_level_enable_mask.sclk_dpm_enable_mask;
+                       while (tmp >>= 1)
+                               level++;
+                       if (level > 0)
+                               smu7_force_clock_level(hwmgr, PP_SCLK, 3 << 
(level-1));
+               }
+       } else if (hwmgr->power_profile_mode == PP_SMC_POWER_PROFILE_COMPUTE) {
+               smu7_force_clock_level(hwmgr, PP_SCLK, 
data->dpm_level_enable_mask.sclk_dpm_enable_mask);
+       }
+}
+
 static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, 
uint32_t size)
 {
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
@@ -5075,6 +5095,7 @@ static int smu7_set_power_profile_mode(struct pp_hwmgr 
*hwmgr, long *input, uint
                                data->current_profile_setting.mclk_down_hyst = 
tmp.mclk_down_hyst;
                                data->current_profile_setting.mclk_activity = 
tmp.mclk_activity;
                        }
+                       smu7_patch_compute_profile_mode(hwmgr, mode);
                        hwmgr->power_profile_mode = mode;
                }
                break;
-- 
1.9.1

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