Rather then relying on the asic type for the second instance.
Makes it more consistent with the rest of the code.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Reviewed-by: Feifei Xu <feifei...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 939f92b295a2..f03993b49b4e 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1399,7 +1399,7 @@ static void sdma_v4_0_update_medium_grain_clock_gating(
                if (def != data)
                        WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CLK_CTRL), 
data);
 
-               if (adev->asic_type == CHIP_VEGA10) {
+               if (adev->sdma.num_instances > 1) {
                        def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, 
mmSDMA1_CLK_CTRL));
                        data &= ~(SDMA1_CLK_CTRL__SOFT_OVERRIDE7_MASK |
                                  SDMA1_CLK_CTRL__SOFT_OVERRIDE6_MASK |
@@ -1427,7 +1427,7 @@ static void sdma_v4_0_update_medium_grain_clock_gating(
                if (def != data)
                        WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CLK_CTRL), 
data);
 
-               if (adev->asic_type == CHIP_VEGA10) {
+               if (adev->sdma.num_instances > 1) {
                        def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, 
mmSDMA1_CLK_CTRL));
                        data |= (SDMA1_CLK_CTRL__SOFT_OVERRIDE7_MASK |
                                 SDMA1_CLK_CTRL__SOFT_OVERRIDE6_MASK |
@@ -1458,7 +1458,7 @@ static void sdma_v4_0_update_medium_grain_light_sleep(
                        WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), 
data);
 
                /* 1-not override: enable sdma1 mem light sleep */
-               if (adev->asic_type == CHIP_VEGA10) {
+               if (adev->sdma.num_instances > 1) {
                        def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, 
mmSDMA1_POWER_CNTL));
                        data |= SDMA1_POWER_CNTL__MEM_POWER_OVERRIDE_MASK;
                        if (def != data)
@@ -1472,7 +1472,7 @@ static void sdma_v4_0_update_medium_grain_light_sleep(
                        WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), 
data);
 
                /* 0-override:disable sdma1 mem light sleep */
-               if (adev->asic_type == CHIP_VEGA10) {
+               if (adev->sdma.num_instances > 1) {
                        def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, 
mmSDMA1_POWER_CNTL));
                        data &= ~SDMA1_POWER_CNTL__MEM_POWER_OVERRIDE_MASK;
                        if (def != data)
-- 
2.13.6

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