On Thu, May 17, 2018 at 4:03 AM, Rex Zhu <rex....@amd.com> wrote:
> Signed-off-by: Rex Zhu <rex....@amd.com>

Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/soc15_common.h | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h 
> b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
> index def8650..0942f49 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
> @@ -47,6 +47,21 @@
>  #define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \
>         WREG32((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + 
> offset, value)
>
> +#define SOC15_WAIT_ON_RREG(ip, inst, reg, expected_value, mask, ret) \
> +       do {                                                    \
> +               uint32_t tmp_ = 
> RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
> +               uint32_t loop = adev->usec_timeout;             \
> +               while ((tmp_ & (mask)) != (expected_value)) {   \
> +                       udelay(2);                              \
> +                       tmp_ = 
> RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
> +                       loop--;                                 \
> +                       if (!loop) {                            \
> +                               ret = -ETIMEDOUT;               \
> +                               break;                          \
> +                       }                                       \
> +               }                                               \
> +       } while (0)
> +
>  #endif
>
>
> --
> 1.9.1
>
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