On Tue, Jun 19, 2018 at 3:38 AM, Evan Quan <evan.q...@amd.com> wrote:
> On UVD/VCE dpm disabled, the powergate status should be
> set as true.
Can you explain this patch a bit? Why is power gate state set to true
when dpm is disabled?
Alex
>
> Change-Id: I569a5aa216b5e7d64a2b504f2ff98cc83ca802d5
> Signed-off-by: Evan Quan <evan.q...@amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> index a124b81..cb0589e 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> @@ -777,6 +777,21 @@ static int vega12_set_allowed_featuresmask(struct
> pp_hwmgr *hwmgr)
> return 0;
> }
>
> +static void vega12_init_powergate_state(struct pp_hwmgr *hwmgr)
> +{
> + struct vega12_hwmgr *data =
> + (struct vega12_hwmgr *)(hwmgr->backend);
> +
> + data->uvd_power_gated = true;
> + data->vce_power_gated = true;
> +
> + if (data->smu_features[GNLD_DPM_UVD].enabled)
> + data->uvd_power_gated = false;
> +
> + if (data->smu_features[GNLD_DPM_VCE].enabled)
> + data->vce_power_gated = false;
> +}
> +
> static int vega12_enable_all_smu_features(struct pp_hwmgr *hwmgr)
> {
> struct vega12_hwmgr *data =
> @@ -801,6 +816,8 @@ static int vega12_enable_all_smu_features(struct pp_hwmgr
> *hwmgr)
> }
> }
>
> + vega12_init_powergate_state(hwmgr);
> +
> return 0;
> }
>
> --
> 2.7.4
>
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