On Mon, Aug 27, 2018 at 12:56 PM Christian König <ckoenig.leichtzumer...@gmail.com> wrote: > > Only use the lower address space on GMC9 for the system domain. > Otherwise we would need to sign extend GMC addresses. > > Signed-off-by: Christian König <christian.koe...@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > index e44b5191735d..d982956c8329 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > @@ -938,11 +938,10 @@ static int gmc_v9_0_sw_init(void *handle) > if (r) > return r; > > - /* Set the internal MC address mask > - * This is the max address of the GPU's > - * internal address space. > + /* Use only the lower range for the internal MC address mask. This is > + * the max address of the GPU's internal address space. > */
Update this comment to note the sign extension requirements and note that this max address is only for the system context (vmid 0). With that fixed: Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> Alex > - adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ > + adev->gmc.mc_mask = 0x7fffffffffffULL; > > /* set DMA mask + need_dma32 flags. > * PCIE - can handle 44-bits. > -- > 2.17.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
