Acked-by: Alex Deucher <[email protected]> ________________________________ From: amd-gfx <[email protected]> on behalf of Satyajit Sahu <[email protected]> Sent: Wednesday, September 26, 2018 4:34:39 AM To: Deucher, Alexander; [email protected] Cc: Sahu, Satyajit; Agrawal, Akshu Subject: [PATCH] drm/amd/powerplay: Enable/Disable NBPSTATE on On/OFF of UVD
From: Akshu Agrawal <[email protected]> We observe black lines (underflow) on display when playing a 4K video with UVD. On Disabling Low memory P state this issue is not seen. Multiple runs of power measurement shows no imapct. Change-Id: I6171ced550ee244e6b9a961fb50247d12f4168a0 Signed-off-by: Akshu Agrawal <[email protected]> Signed-off-by: Satyajit Sahu <[email protected]> Acked-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c index b863704..86b6a43 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c @@ -1227,14 +1227,17 @@ static int smu8_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, static int smu8_dpm_powerdown_uvd(struct pp_hwmgr *hwmgr) { - if (PP_CAP(PHM_PlatformCaps_UVDPowerGating)) + if (PP_CAP(PHM_PlatformCaps_UVDPowerGating)) { + smu8_nbdpm_pstate_enable_disable(hwmgr, true, true); return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UVDPowerOFF); + } return 0; } static int smu8_dpm_powerup_uvd(struct pp_hwmgr *hwmgr) { if (PP_CAP(PHM_PlatformCaps_UVDPowerGating)) { + smu8_nbdpm_pstate_enable_disable(hwmgr, false, true); return smum_send_msg_to_smc_with_parameter( hwmgr, PPSMC_MSG_UVDPowerON, -- 1.9.1 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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