Am 16.10.2018 um 20:00 schrieb Zhao, Yong:
The flags are added when calling amdgpu_gmc_pd_addr().
Change-Id: Idd85b1ac35d3d100154df8229ea20721d9a7045c
Signed-off-by: Yong Zhao <yong.z...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 5 ++---
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 2 +-
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index be76f15..ec3cf0b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -1001,7 +1001,6 @@ static void set_vm_context_page_table_base(struct kgd_dev
*kgd, uint32_t vmid,
uint64_t page_table_base)
{
struct amdgpu_device *adev = get_amdgpu_device(kgd);
- uint64_t base = page_table_base | AMDGPU_PTE_VALID;
if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) {
pr_err("trying to set page table base for wrong VMID %u\n",
@@ -1013,7 +1012,7 @@ static void set_vm_context_page_table_base(struct kgd_dev
*kgd, uint32_t vmid,
* now, all processes share the same address space size, like
* on GFX8 and older.
*/
- mmhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
+ mmhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);
- gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
+ gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);
}
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index 53ff86d..b82e5b3 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -507,7 +507,7 @@ struct qcm_process_device {
* All the memory management data should be here too
*/
uint64_t gds_context_area;
- uint64_t page_table_base;
+ uint64_t page_table_base; /* includes page table flags since gfx9 */
As a general comment on coding style: Please never write comments after
a field!
For an example how to write clean kernel style comments see
ttm_bus_placement in include/drm/ttm/ttm_bo_api.h.
Christian.
uint32_t sh_mem_config;
uint32_t sh_mem_bases;
uint32_t sh_mem_ape1_base;
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