Is this required? Are the harvesting fuses incorrect? If the blocks are
harvested, we should bail out of the blocks properly during init. Also, please
make this more explicit if we still need it. E.g.,
if ((adev->pdev->device == 0x67df) &&
(adev->pdev->revision == 0xf7)) {
/* Some polaris12 variants don't support UVD/VCE */
} else {
amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
}
That way if we re-arrange the order later, it will be easier to track.
Alex
________________________________
From: amd-gfx <[email protected]> on behalf of Junwei Zhang
<[email protected]>
Sent: Friday, November 23, 2018 3:32:27 AM
To: [email protected]
Cc: Zhang, Jerry
Subject: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants
Some variants don't support UVD and VCE.
Signed-off-by: Junwei Zhang <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/vi.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index f3a4cf1f013a..3338b013ded4 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1660,6 +1660,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &dce_v11_2_ip_block);
amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
+ /* Some polaris12 variants don't support UVD/VCE */
+ if ((adev->pdev->device == 0x67df) &&
+ (adev->pdev->revision == 0xf7))
+ break;
amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
break;
--
2.17.1
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