If a particular engine is not available, don't expose its
scheduling entity.  This will cause the CS ioctl to fail
rather than trying to use an uninitialized ring if a particular
IP is not available.

Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 13 ++++++++++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h |  1 +
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 9d2dfa5b83ea..3f76d1a7034b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -150,11 +150,13 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
                for (j = 0; j < num_rings; ++j)
                        rqs[j] = &rings[j]->sched.sched_rq[priority];
 
-               for (j = 0; j < amdgpu_ctx_num_entities[i]; ++j)
+               for (j = 0; j < amdgpu_ctx_num_entities[i]; ++j) {
                        r = drm_sched_entity_init(&ctx->entities[i][j].entity,
                                                  rqs, num_rings, &ctx->guilty);
-               if (r)
-                       goto error_cleanup_entities;
+                       if (r)
+                               goto error_cleanup_entities;
+                       ctx->entities[i][j].valid = true;
+               }
        }
 
        return 0;
@@ -210,6 +212,11 @@ int amdgpu_ctx_get_entity(struct amdgpu_ctx *ctx, u32 
hw_ip, u32 instance,
                return -EINVAL;
        }
 
+       if (!ctx->entities[hw_ip][ring].valid) {
+               DRM_DEBUG("invalid entity: %d %d\n", hw_ip, ring);
+               return -EINVAL;
+       }
+
        *entity = &ctx->entities[hw_ip][ring].entity;
        return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index b3b012c0a7da..6dd6c206daeb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -33,6 +33,7 @@ struct amdgpu_ctx_entity {
        uint64_t                sequence;
        struct dma_fence        **fences;
        struct drm_sched_entity entity;
+       bool valid;
 };
 
 struct amdgpu_ctx {
-- 
2.13.6

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