From: Jun Lei <jun....@amd.com>
[why]
stream ID allows DMs to avoid memory address comparisons to compare
stream equality.
otg_instance allows DC to more rigorously define when otg_instance
can change. specifically, it is now defined to be only mutable when
dc_stream_state
changes. This is better than a "get status" function which prevents efficient
caching of otherwise very stable information.
[how]
stream ID follows similar pattern to sink ID, which is already implemented
otg_instance is an output which occurs on all dc_stream modification functions
Signed-off-by: Jun Lei <jun....@amd.com>
Reviewed-by: Tony Cheng <tony.ch...@amd.com>
Acked-by: Aric Cyr <aric....@amd.com>
Acked-by: Leo Li <sunpeng...@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 5 +++++
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 3 +++
drivers/gpu/drm/amd/display/dc/dc_stream.h | 12 ++++++++++++
drivers/gpu/drm/amd/display/dc/dc_types.h | 1 +
4 files changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 231a4a4..3f472c7 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -673,6 +673,7 @@ static bool construct(struct dc *dc,
dc_ctx->dc = dc;
dc_ctx->asic_id = init_params->asic_id;
dc_ctx->dc_sink_id_count = 0;
+ dc_ctx->dc_stream_id_count = 0;
dc->ctx = dc_ctx;
dc->current_state = dc_create_state();
@@ -1049,6 +1050,7 @@ static enum dc_status dc_commit_state_no_check(struct dc
*dc, struct dc_state *c
/* Program all planes within new context*/
for (i = 0; i < context->stream_count; i++) {
const struct dc_link *link = context->streams[i]->link;
+ struct dc_stream_status *status;
if (!context->streams[i]->mode_changed)
continue;
@@ -1073,6 +1075,9 @@ static enum dc_status dc_commit_state_no_check(struct dc
*dc, struct dc_state *c
}
}
+ status = dc_stream_get_status(context->streams[i]);
+ context->streams[i]->out.otg_offset = status->primary_otg_inst;
+
CONN_MSG_MODE(link, "{%dx%d, %dx%d@%dKhz}",
context->streams[i]->timing.h_addressable,
context->streams[i]->timing.v_addressable,
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 8f9dc6f..336586b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -107,6 +107,9 @@ static void construct(struct dc_stream_state *stream,
stream->out_transfer_func = dc_create_transfer_func();
stream->out_transfer_func->type = TF_TYPE_BYPASS;
stream->out_transfer_func->ctx = stream->ctx;
+
+ stream->stream_id = stream->ctx->dc_stream_id_count;
+ stream->ctx->dc_stream_id_count++;
}
static void destruct(struct dc_stream_state *stream)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h
b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index 8a778dd..0dfad73 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -127,6 +127,18 @@ struct dc_stream_state {
/* Computed state bits */
bool mode_changed : 1;
+ /* Output from DC when stream state is committed or altered
+ * DC may only access these values during:
+ * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
+ * values may not change outside of those calls
+ */
+ struct {
+ // For interrupt management, some hardware instance
+ // offsets need to be exposed to DM
+ uint8_t otg_offset;
+ } out;
+
+ uint32_t stream_id;
};
struct dc_stream_update {
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h
b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 0b20ae2..07cd165 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -99,6 +99,7 @@ struct dc_context {
struct gpio_service *gpio_service;
struct i2caux *i2caux;
uint32_t dc_sink_id_count;
+ uint32_t dc_stream_id_count;
uint64_t fbc_gpu_addr;
};
--
2.7.4
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