Vega20 uses ring id 1 for page queues EOP irq while previous
ASICs take ring id 3.
Change-Id: Id837fa934ab4a60f0360a33216413a8fc9987c56
Signed-off-by: Evan Quan <evan.q...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 4b6d3e5c821f..d59addb47025 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1706,13 +1706,15 @@ static int sdma_v4_0_process_trap_irq(struct
amdgpu_device *adev,
amdgpu_fence_process(&adev->sdma.instance[instance].ring);
break;
case 1:
- /* XXX compute */
+ if (adev->asic_type == CHIP_VEGA20)
+
amdgpu_fence_process(&adev->sdma.instance[instance].page);
break;
case 2:
/* XXX compute */
break;
case 3:
- amdgpu_fence_process(&adev->sdma.instance[instance].page);
+ if (adev->asic_type != CHIP_VEGA20)
+
amdgpu_fence_process(&adev->sdma.instance[instance].page);
break;
}
return 0;
--
2.19.2
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