Ping... Hi Christian and Alex
Can you help review this? Thanks in advance. Best Regards Yintian Tao -----Original Message----- From: amd-gfx <[email protected]> On Behalf Of Yintian Tao Sent: Thursday, May 16, 2019 8:11 PM To: [email protected] Cc: Liu, Monk <[email protected]>; Tao, Yintian <[email protected]> Subject: [PATCH] drm/amdgpu: don't read DF register for SRIOV [CAUTION: External Email] Under SRIOV, reading DF register has chance to lead to AER error in host side, just skip reading it. Signed-off-by: Monk Liu <[email protected]> Signed-off-by: Yintian Tao <[email protected]> --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index a417763..b5bf9ed 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -837,7 +837,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev) if (amdgpu_emu_mode != 1) adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev); - if (!adev->gmc.vram_width) { + if (!adev->gmc.vram_width && !amdgpu_sriov_vf(adev)) { /* hbm memory channel size */ if (adev->flags & AMD_IS_APU) chansize = 64; -- 2.7.4 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
