In Renoir's emulator, those chicken bits need to be programmed.
Signed-off-by: Aaron Liu <aaron....@amd.com>
Reviewed-by: Huang Rui <ray.hu...@amd.com>
Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h
b/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h
index 1ee3a23..dc9895a 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h
@@ -1109,7 +1109,11 @@
#define IH_CID_REMAP_DATA__CLIENT_ID_REMAP_MASK
0x00FF0000L
//IH_CHICKEN
#define IH_CHICKEN__ACTIVE_FCN_ID_PROT_ENABLE__SHIFT
0x0
+#define IH_CHICKEN__MC_SPACE_FBPA_ENABLE__SHIFT
0x3
+#define IH_CHICKEN__MC_SPACE_GPA_ENABLE__SHIFT
0x4
#define IH_CHICKEN__ACTIVE_FCN_ID_PROT_ENABLE_MASK
0x00000001L
+#define IH_CHICKEN__MC_SPACE_FBPA_ENABLE_MASK
0x00000008L
+#define IH_CHICKEN__MC_SPACE_GPA_ENABLE_MASK
0x00000010L
//IH_MMHUB_CNTL
#define IH_MMHUB_CNTL__UNITID__SHIFT
0x0
#define IH_MMHUB_CNTL__IV_TLVL__SHIFT
0x8
--
2.7.4
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