-----Original Message----- From: amd-gfx <[email protected]> On Behalf Of Jesse Zhang Sent: Friday, September 27, 2019 6:08 PM To: [email protected] Cc: root <[email protected]>; Zhang, Zhexi (Jesse) <[email protected]> Subject: [PATCH] drm/amd/powerplay: Protect backend resource when unload driver
From: root <[email protected]> Guest driver can be unloaded while engines still using some backend resources. That would lead to use after free and then cause guest driver failed. Need to add mutex lock before backend resources free to make sure nobody is using it. Need to check backend data availablility before VCE/UVD enter powergating mode, if backend resources have been free, then skip entering powergating. Change-Id: If7f93221ddecc578884dc9e99a52f22a43e16b07 Signed-off-by: Jesse Zhang <[email protected]> --- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index d08493b..a9320a5 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c @@ -810,8 +810,10 @@ static int vega10_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl); hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL; + mutex_lock(&hwmgr->smu_lock); kfree(hwmgr->backend); hwmgr->backend = NULL; + mutex_unlock(&hwmgr->smu_lock); [Quan, Evan] Please move this lock protection to upper layer(amd_powerplay.c) since that's where all the locks should be. return 0; } @@ -4619,16 +4621,20 @@ static void vega10_power_gate_vce(struct pp_hwmgr *hwmgr, bool bgate) { struct vega10_hwmgr *data = hwmgr->backend; - data->vce_power_gated = bgate; - vega10_enable_disable_vce_dpm(hwmgr, !bgate); + if(data){ + data->vce_power_gated = bgate; + vega10_enable_disable_vce_dpm(hwmgr, !bgate); + } } static void vega10_power_gate_uvd(struct pp_hwmgr *hwmgr, bool bgate) { struct vega10_hwmgr *data = hwmgr->backend; - data->uvd_power_gated = bgate; - vega10_enable_disable_uvd_dpm(hwmgr, !bgate); + if(data){ + data->uvd_power_gated = bgate; + vega10_enable_disable_uvd_dpm(hwmgr, !bgate); + } } static inline bool vega10_are_power_levels_equal( -- 2.7.4 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
