Comment inline
> -----Original Message----- > From: amd-gfx <[email protected]> On Behalf Of Matt > Coffin > Sent: Friday, November 8, 2019 2:35 AM > To: [email protected] > Cc: Matt Coffin <[email protected]> > Subject: [PATCH 2/3] drm/amdgpu/navi10: implement GFXCLK_CURVE > overdrive > > [Why] > Before this patch, there was no way to set the gfxclk voltage curve in the > overdrive settings for navi10 through pp_od_clk_voltage > > [How] > Add the required implementation to navi10's ppt dpm table editing > implementation, similar to the vega20 implementation and interface. > --- > drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 55 +++++++++++++++++++++- > drivers/gpu/drm/amd/powerplay/navi10_ppt.h | 2 + > 2 files changed, 55 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > index 6d0e511ad093..e717328f93ce 100644 > --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > @@ -1667,6 +1667,8 @@ static int navi10_od_edit_dpm_table(struct > smu_context *smu, enum PP_OD_DPM_TABL > struct smu_table_context *table_context = &smu->smu_table; > OverDriveTable_t *od_table; > struct smu_11_0_overdrive_table *od_settings; > + enum SMU_11_0_ODSETTING_ID freq_setting, voltage_setting; > + uint16_t *freq_ptr, *voltage_ptr; > od_table = (OverDriveTable_t *)table_context->overdrive_table; > > if (!smu->od_enabled) { > @@ -1766,8 +1768,57 @@ static int navi10_od_edit_dpm_table(struct > smu_context *smu, enum PP_OD_DPM_TABL > } > break; > case PP_OD_EDIT_VDDC_CURVE: > - // TODO: implement > - return -ENOSYS; > + if (!navi10_od_feature_is_supported(od_settings, > SMU_11_0_ODFEATURE_GFXCLK_CURVE)) { > + pr_warn("GFXCLK_CURVE not supported!\n"); > + return -ENOTSUPP; > + } > + if (size < 3) { > + pr_info("invalid number of parameters: %d\n", size); > + return -EINVAL; > + } > + if (!od_table) { > + pr_info("Overdrive is not initialized\n"); > + return -EINVAL; > + } > + > + switch (input[0]) { > + case 0: > + freq_setting = > SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1; > + voltage_setting = > SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1; > + freq_ptr = &od_table->GfxclkFreq1; > + voltage_ptr = &od_table->GfxclkVolt1; > + break; > + case 1: > + freq_setting = > SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2; > + voltage_setting = > SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2; > + freq_ptr = &od_table->GfxclkFreq2; > + voltage_ptr = &od_table->GfxclkVolt2; > + break; > + case 2: > + freq_setting = > SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3; > + voltage_setting = > SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3; > + freq_ptr = &od_table->GfxclkFreq3; > + voltage_ptr = &od_table->GfxclkVolt3; > + break; > + default: > + pr_info("Invalid VDDC_CURVE index: %ld\n", input[0]); > + pr_info("Supported indices: [0, 1, 2]\n"); > + return -EINVAL; > + } > + ret = navi10_od_setting_check_range(od_settings, freq_setting, > input[1]); > + if (ret) > + return ret; > + // Allow setting zero to disable the OverDrive VDDC curve > + if (input[2] != 0) { > + ret = navi10_od_setting_check_range(od_settings, > voltage_setting, input[2]); > + if (ret) > + return ret; > + } > + *freq_ptr = input[1]; > + *voltage_ptr = ((uint16_t)input[2]) * NAVI10_VOLTAGE_SCALE; [Quan, Evan] Need to move this under "if (input[2] != 0)" protection also I think. > + pr_debug("OD: set curve %ld: (%d, %d)\n", input[0], *freq_ptr, > *voltage_ptr); > + navi10_dump_od_table(od_table); > + break; > default: > return -ENOSYS; > } > diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.h > b/drivers/gpu/drm/amd/powerplay/navi10_ppt.h > index 620ff17c2fef..484d2c58fc06 100644 > --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.h > +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.h > @@ -27,6 +27,8 @@ > #define NAVI10_PEAK_SCLK_XT (1755) > #define NAVI10_PEAK_SCLK_XL (1625) > > +#define NAVI10_VOLTAGE_SCALE (4) > + > extern void navi10_set_ppt_funcs(struct smu_context *smu); > > #endif > -- > 2.23.0 > > > From e091c4085ecc669ea907fe5d8515f14586863f9b Mon Sep 17 00:00:00 > 2001 > Message-Id: > <e091c4085ecc669ea907fe5d8515f14586863f9b.1573151434.git.mcoffin13@g > mail.com> > In-Reply-To: <[email protected]> > References: <[email protected]> > From: Matt Coffin <[email protected]> > Date: Wed, 6 Nov 2019 12:05:28 -0700 > Subject: [PATCH 3/3] drm/amdgpu/navi10: Implement od clk printing > To: [email protected] > > [Why] > Before this patch, navi10 overdrive settings could not be printed via > pp_od_clk_voltage > > [How] > Implement printing for the overdrive settings for the following clocks > in navi10's ppt print_clk_levels implementation: > > * SMU_OD_SCLK > * SMU_OD_MCLK > * SMU_OD_VDDC_CURVE > --- > drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 56 ++++++++++++++++++++-- > 1 file changed, 51 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > index e717328f93ce..506af59ff45f 100644 > --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > @@ -677,13 +677,25 @@ static bool > navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu > return dpm_desc->SnapToDiscrete == 0 ? true : false; > } > > +static inline bool navi10_od_feature_is_supported(struct > smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODFEATURE_ID > feature) > +{ > + return od_table->cap[feature]; > +} > + > + > static int navi10_print_clk_levels(struct smu_context *smu, > enum smu_clk_type clk_type, char *buf) > { > + OverDriveTable_t *od_table; > + struct smu_11_0_overdrive_table *od_settings; > + uint16_t *curve_settings; > int i, size = 0, ret = 0; > uint32_t cur_value = 0, value = 0, count = 0; > uint32_t freq_values[3] = {0}; > uint32_t mark_index = 0; > + struct smu_table_context *table_context = &smu->smu_table; > + od_table = (OverDriveTable_t *)table_context->overdrive_table; > + od_settings = smu->od_settings; > > switch (clk_type) { > case SMU_GFXCLK: > @@ -734,6 +746,45 @@ static int navi10_print_clk_levels(struct smu_context > *smu, > > } > break; > + case SMU_OD_SCLK: > + if (!smu->od_enabled || !od_table || !od_settings) > + break; > + if (!navi10_od_feature_is_supported(od_settings, > SMU_11_0_ODFEATURE_GFXCLK_LIMITS)) > + break; > + size += sprintf(buf + size, "OD_SCLK:\n"); > + size += sprintf(buf + size, "0: %uMhz\n1: %uMhz\n", od_table- > >GfxclkFmin, od_table->GfxclkFmax); > + break; > + case SMU_OD_MCLK: > + if (!smu->od_enabled || !od_table || !od_settings) > + break; > + if (!navi10_od_feature_is_supported(od_settings, > SMU_11_0_ODFEATURE_UCLK_MAX)) > + break; > + size += sprintf(buf + size, "OD_MCLK:\n"); > + size += sprintf(buf + size, "0: %uMHz\n", od_table->UclkFmax); > + break; > + case SMU_OD_VDDC_CURVE: > + if (!smu->od_enabled || !od_table || !od_settings) > + break; > + if (!navi10_od_feature_is_supported(od_settings, > SMU_11_0_ODFEATURE_GFXCLK_CURVE)) > + break; > + size += sprintf(buf + size, "OD_VDDC_CURVE:\n"); > + for (i = 0; i < 3; i++) { > + switch (i) { > + case 0: > + curve_settings = &od_table->GfxclkFreq1; > + break; > + case 1: > + curve_settings = &od_table->GfxclkFreq2; > + break; > + case 2: > + curve_settings = &od_table->GfxclkFreq3; > + break; > + default: > + break; > + } > + size += sprintf(buf + size, "%d: %uMHz @ %umV\n", i, > curve_settings[0], curve_settings[1] / NAVI10_VOLTAGE_SCALE); > + } > + break; > default: > break; > } > @@ -1600,11 +1651,6 @@ static inline void > navi10_dump_od_table(OverDriveTable_t *od_table) { > pr_debug("OD: OverDrivePct: %d\n", od_table->OverDrivePct); > } > > -static inline bool navi10_od_feature_is_supported(struct > smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODFEATURE_ID > feature) > -{ > - return od_table->cap[feature]; > -} > - > static int navi10_od_setting_check_range(struct smu_11_0_overdrive_table > *od_table, enum SMU_11_0_ODSETTING_ID setting, uint32_t value) > { > if (value < od_table->min[setting]) { > -- > 2.23.0 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
