This is needed for coming asic init on performing gpu reset. V2: use non-asic specific programing way
Change-Id: If3671a24d239e3d288665fadaa2c40c87d5da40b Signed-off-by: Evan Quan <[email protected]> --- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index f5469ad43929..7781d245f8ef 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -1676,10 +1676,17 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state) } } else { ret = smu_send_smc_msg(smu, SMU_MSG_ExitBaco); + if (ret) + goto out; + bif_doorbell_intr_cntl = REG_SET_FIELD(bif_doorbell_intr_cntl, BIF_DOORBELL_INT_CNTL, DOORBELL_INTERRUPT_DISABLE, 0); WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl); + + /* clear vbios scratch 6 and 7 for coming asic reinit */ + WREG32(adev->bios_scratch_reg_offset + 6, 0); + WREG32(adev->bios_scratch_reg_offset + 7, 0); } if (ret) goto out; -- 2.24.0 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
