Couldn't only rely on enc fence to decide switching to dpg unpaude mode.
Since a enc thread may not schedule a fence in time during multiple
threads running situation.

Signed-off-by: James Zhu <james....@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 28 ++++++++++++++++++----------
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h |  1 +
 2 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index aa7663f..74cefc7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -64,6 +64,8 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
 
        INIT_DELAYED_WORK(&adev->vcn.idle_work, amdgpu_vcn_idle_work_handler);
        mutex_init(&adev->vcn.vcn_pg_lock);
+       for (i = 0; i < adev->vcn.num_vcn_inst; i++)
+               atomic_set(&adev->vcn.inst[i].enc_submission_cnt, 0);
 
        switch (adev->asic_type) {
        case CHIP_RAVEN:
@@ -332,19 +334,22 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
 
        if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)    {
                struct dpg_pause_state new_state;
-               unsigned int fences = 0;
-               unsigned int i;
 
-               for (i = 0; i < adev->vcn.num_enc_rings; ++i) {
-                       fences += 
amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]);
-               }
-               if (fences)
+               if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) {
+                       
atomic_inc(&adev->vcn.inst[ring->me].enc_submission_cnt);
                        new_state.fw_based = VCN_DPG_STATE__PAUSE;
-               else
-                       new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
+               } else {
+                       unsigned int fences = 0;
+                       unsigned int i;
 
-               if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC)
-                       new_state.fw_based = VCN_DPG_STATE__PAUSE;
+                       for (i = 0; i < adev->vcn.num_enc_rings; ++i)
+                               fences += 
amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]);
+
+                       if (fences || 
atomic_read(&adev->vcn.inst[ring->me].enc_submission_cnt))
+                               new_state.fw_based = VCN_DPG_STATE__PAUSE;
+                       else
+                               new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
+               }
 
                adev->vcn.pause_dpg_mode(adev, ring->me, &new_state);
        }
@@ -354,6 +359,9 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
 void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring)
 {
        schedule_delayed_work(&ring->adev->vcn.idle_work, VCN_IDLE_TIMEOUT);
+       if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC &&
+               
atomic_dec_return(&ring->adev->vcn.inst[ring->me].enc_submission_cnt) < 0)
+               atomic_set(&ring->adev->vcn.inst[ring->me].enc_submission_cnt, 
0);
 }
 
 int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index 2ae110d..4ca76c4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -183,6 +183,7 @@ struct amdgpu_vcn_inst {
        void                    *dpg_sram_cpu_addr;
        uint64_t                dpg_sram_gpu_addr;
        uint32_t                *dpg_sram_curr_addr;
+       atomic_t                enc_submission_cnt;
 };
 
 struct amdgpu_vcn {
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to