From: Stylon Wang <[email protected]> [Why] - In amdgpu_dm_update_plane_color_mgmt() it is inconsistent in taking in dm_crtc_state and dc_plane_state. - Makes supporting plane-level color management with proper guard more complicated than necessary.
[How] Pass in dm_plane_state in place of dc_plane_state in amdgpu_dm_update_plane_color_mgmt(). Signed-off-by: Stylon Wang <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +++++++++---------- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 3 ++- 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 3dcd4de0b2b3..47af6e9a31bc 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -3772,11 +3772,12 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev, } static int fill_dc_plane_attributes(struct amdgpu_device *adev, - struct dc_plane_state *dc_plane_state, + struct dm_plane_state *dm_plane_state, struct drm_plane_state *plane_state, struct drm_crtc_state *crtc_state) { struct dm_crtc_state *dm_crtc_state = to_dm_crtc_state(crtc_state); + struct dc_plane_state *dc_plane_state = dm_plane_state->dc_state; const struct amdgpu_framebuffer *amdgpu_fb = to_amdgpu_framebuffer(plane_state->fb); struct dc_scaling_info scaling_info; @@ -3824,7 +3825,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, * Always set input transfer function, since plane state is refreshed * every time. */ - ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dc_plane_state); + ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dm_plane_state); if (ret) return ret; @@ -8027,16 +8028,6 @@ static int dm_update_plane_state(struct dc *dc, DRM_DEBUG_DRIVER("Enabling DRM plane: %d on DRM crtc %d\n", plane->base.id, new_plane_crtc->base.id); - ret = fill_dc_plane_attributes( - new_plane_crtc->dev->dev_private, - dc_new_plane_state, - new_plane_state, - new_crtc_state); - if (ret) { - dc_plane_state_release(dc_new_plane_state); - return ret; - } - ret = dm_atomic_get_state(state, &dm_state); if (ret) { dc_plane_state_release(dc_new_plane_state); @@ -8062,6 +8053,14 @@ static int dm_update_plane_state(struct dc *dc, dm_new_plane_state->dc_state = dc_new_plane_state; + ret = fill_dc_plane_attributes( + new_plane_crtc->dev->dev_private, + dm_new_plane_state, + new_plane_state, + new_crtc_state); + if (ret) + return ret; + /* Tell DC to do a full surface update every time there * is a plane change. Inefficient, but works for now. */ diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 3f0c6298b588..f30dc004bf2b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -482,7 +482,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, void amdgpu_dm_init_color_mod(void); int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc); int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc, - struct dc_plane_state *dc_plane_state); + struct dm_plane_state *plane); void amdgpu_dm_update_connector_after_detect( struct amdgpu_dm_connector *aconnector); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 2233d293a707..6b58761e4b04 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -416,9 +416,10 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) * Returns 0 on success. */ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc, - struct dc_plane_state *dc_plane_state) + struct dm_plane_state *plane) { const struct drm_color_lut *degamma_lut; + struct dc_plane_state *dc_plane_state = plane->dc_state; uint32_t degamma_size; int r; -- 2.26.0 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
