From: Likun Gao <[email protected]> Enable Display Clocks Dynamic Power Management (DPM) for sienna_cichlid. Enable Display Controller Engine Fabric Clock Deep Sleep for sienna_cichlid.
Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c index a91e6f753bea..852c364fd7a3 100644 --- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c @@ -45,7 +45,8 @@ FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \ FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | \ FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \ - FEATURE_MASK(FEATURE_DPM_FCLK_BIT)) + FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | \ + FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)) #define MSG_MAP(msg, index) \ [SMU_MSG_##msg] = {1, (index)} @@ -272,6 +273,7 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) | FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT) + | FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT) | FEATURE_MASK(FEATURE_FW_DSTATE_BIT) | FEATURE_MASK(FEATURE_DF_CSTATE_BIT) | FEATURE_MASK(FEATURE_THERMAL_BIT); @@ -282,6 +284,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT); + if (adev->pm.pp_feature & PP_DCEFCLK_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); + if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); -- 2.25.4 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
