On Tue, Jun 2, 2020 at 4:38 PM Ruhl, Michael J <[email protected]> wrote:
> >-----Original Message-----
> >From: dri-devel <[email protected]> On Behalf Of
> >Piotr Stankiewicz
> >Sent: Tuesday, June 2, 2020 5:21 AM
> >To: Alex Deucher <[email protected]>; Christian König
> ><[email protected]>; David Zhou <[email protected]>; David
> >Airlie <[email protected]>; Daniel Vetter <[email protected]>
> >Cc: Stankiewicz, Piotr <[email protected]>; dri-
> >[email protected]; [email protected]; linux-
> >[email protected]
> >Subject: [PATCH 07/15] drm/amdgpu: use PCI_IRQ_MSI_TYPES where
> >appropriate
...
> > int nvec = pci_msix_vec_count(adev->pdev);
> > unsigned int flags;
> >
> >- if (nvec <= 0) {
> >+ if (nvec > 0)
> >+ flags = PCI_IRQ_MSI_TYPES;
> >+ else
> > flags = PCI_IRQ_MSI;
> >- } else {
> >- flags = PCI_IRQ_MSI | PCI_IRQ_MSIX;
> >- }
>
> Minor nit:
>
> Is it really necessary to set do this check? Can flags just
> be set?
>
> I.e.:
> flags = PCI_IRQ_MSI_TYPES;
>
> pci_alloc_irq_vector() tries stuff in order. If MSIX is not available,
> it will try MSI.
That's also what I proposed earlier. But I suggested as well to wait
for AMD people to confirm that neither pci_msix_vec_count() nor flags
is needed and we can directly supply MSI_TYPES to the below call.
> > /* we only need one vector */
> > nvec = pci_alloc_irq_vectors(adev->pdev, 1, 1, flags);
--
With Best Regards,
Andy Shevchenko
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