We are moving to centralize all feature enablement/support checking and
setting APIs in smu_cmn.c.

Change-Id: I5b2328cd5a7e34ed9f607505545fd399277126c5
Signed-off-by: Evan Quan <[email protected]>
---
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c    | 10 ++--------
 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c  |  1 +
 .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h    |  1 +
 drivers/gpu/drm/amd/powerplay/navi10_ppt.c    |  1 +
 drivers/gpu/drm/amd/powerplay/renoir_ppt.c    |  1 +
 .../drm/amd/powerplay/sienna_cichlid_ppt.c    |  1 +
 drivers/gpu/drm/amd/powerplay/smu_cmn.c       | 19 +++++++++++++++++++
 drivers/gpu/drm/amd/powerplay/smu_cmn.h       |  3 +++
 drivers/gpu/drm/amd/powerplay/smu_internal.h  |  1 +
 9 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 
b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index d9879cf6255f..97a9cc31dbf7 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -1094,7 +1094,6 @@ static int smu_hw_init(void *handle)
 static int smu_disable_dpms(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
-       uint64_t features_to_disable;
        int ret = 0;
        bool use_baco = !smu->is_apu &&
                ((adev->in_gpu_reset &&
@@ -1130,13 +1129,8 @@ static int smu_disable_dpms(struct smu_context *smu)
         * BACO feature has to be kept enabled.
         */
        if (use_baco && smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)) {
-               features_to_disable = U64_MAX &
-                       ~(1ULL << smu_cmn_to_asic_specific_index(smu,
-                                                       
CMN2ASIC_MAPPING_FEATURE,
-                                                       SMU_FEATURE_BACO_BIT));
-               ret = smu_feature_update_enable_state(smu,
-                                                     features_to_disable,
-                                                     0);
+               ret = smu_disable_all_features_with_exception(smu,
+                                                             
SMU_FEATURE_BACO_BIT);
                if (ret)
                        dev_err(adev->dev, "Failed to disable smu features 
except BACO.\n");
        } else {
diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 
b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
index 568eeebcc0e0..d126905e6597 100644
--- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
@@ -2275,6 +2275,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
        .set_allowed_mask = smu_v11_0_set_allowed_mask,
        .get_enabled_mask = smu_cmn_get_enabled_mask,
        .feature_is_enabled = smu_cmn_feature_is_enabled,
+       .disable_all_features_with_exception = 
smu_cmn_disable_all_features_with_exception,
        .notify_display_change = NULL,
        .set_power_limit = smu_v11_0_set_power_limit,
        .init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks,
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 42cee69b3163..cb922f4136c9 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -534,6 +534,7 @@ struct pptable_funcs {
        int (*set_allowed_mask)(struct smu_context *smu);
        int (*get_enabled_mask)(struct smu_context *smu, uint32_t 
*feature_mask, uint32_t num);
        int (*feature_is_enabled)(struct smu_context *smu, enum 
smu_feature_mask mask);
+       int (*disable_all_features_with_exception)(struct smu_context *smu, 
enum smu_feature_mask mask);
        int (*notify_display_change)(struct smu_context *smu);
        int (*set_power_limit)(struct smu_context *smu, uint32_t n);
        int (*init_max_sustainable_clocks)(struct smu_context *smu);
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c 
b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index f8dc08bed908..4f66eb9011fc 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -2300,6 +2300,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .set_allowed_mask = smu_v11_0_set_allowed_mask,
        .get_enabled_mask = smu_cmn_get_enabled_mask,
        .feature_is_enabled = smu_cmn_feature_is_enabled,
+       .disable_all_features_with_exception = 
smu_cmn_disable_all_features_with_exception,
        .notify_display_change = smu_v11_0_notify_display_change,
        .set_power_limit = smu_v11_0_set_power_limit,
        .init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks,
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c 
b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 57756288d0de..e6a4dff61aee 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -991,6 +991,7 @@ static const struct pptable_funcs renoir_ppt_funcs = {
        .set_default_dpm_table = smu_v12_0_set_default_dpm_tables,
        .get_enabled_mask = smu_cmn_get_enabled_mask,
        .feature_is_enabled = smu_cmn_feature_is_enabled,
+       .disable_all_features_with_exception = 
smu_cmn_disable_all_features_with_exception,
        .get_dpm_ultimate_freq = renoir_get_dpm_ultimate_freq,
        .mode2_reset = smu_v12_0_mode2_reset,
        .set_soft_freq_limited_range = smu_v12_0_set_soft_freq_limited_range,
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c 
b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 2eabb1f3924b..5c524a57341a 100644
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -2419,6 +2419,7 @@ static const struct pptable_funcs 
sienna_cichlid_ppt_funcs = {
        .set_allowed_mask = smu_v11_0_set_allowed_mask,
        .get_enabled_mask = smu_cmn_get_enabled_mask,
        .feature_is_enabled = smu_cmn_feature_is_enabled,
+       .disable_all_features_with_exception = 
smu_cmn_disable_all_features_with_exception,
        .notify_display_change = NULL,
        .set_power_limit = smu_v11_0_set_power_limit,
        .init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks,
diff --git a/drivers/gpu/drm/amd/powerplay/smu_cmn.c 
b/drivers/gpu/drm/amd/powerplay/smu_cmn.c
index d0293b3dc9ab..85c106966f9a 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_cmn.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_cmn.c
@@ -355,3 +355,22 @@ int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
 
        return ret;
 }
+
+int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
+                                               enum smu_feature_mask mask)
+{
+       uint64_t features_to_disable = U64_MAX;
+       int skipped_feature_id;
+
+       skipped_feature_id = smu_cmn_to_asic_specific_index(smu,
+                                                           
CMN2ASIC_MAPPING_FEATURE,
+                                                           mask);
+       if (skipped_feature_id < 0)
+               return -EINVAL;
+
+       features_to_disable &= ~(1ULL << skipped_feature_id);
+
+       return smu_cmn_feature_update_enable_state(smu,
+                                                  features_to_disable,
+                                                  0);
+}
diff --git a/drivers/gpu/drm/amd/powerplay/smu_cmn.h 
b/drivers/gpu/drm/amd/powerplay/smu_cmn.h
index 36a2931a4ab3..08968ad24d10 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_cmn.h
+++ b/drivers/gpu/drm/amd/powerplay/smu_cmn.h
@@ -49,4 +49,7 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
 int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
                                uint64_t new_mask);
 
+int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
+                                               enum smu_feature_mask mask);
+
 #endif
diff --git a/drivers/gpu/drm/amd/powerplay/smu_internal.h 
b/drivers/gpu/drm/amd/powerplay/smu_internal.h
index 94f3ba092637..5ff37b550cae 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_internal.h
+++ b/drivers/gpu/drm/amd/powerplay/smu_internal.h
@@ -55,6 +55,7 @@
 #define smu_feature_set_allowed_mask(smu)                              
smu_ppt_funcs(set_allowed_mask, 0, smu)
 #define smu_feature_get_enabled_mask(smu, mask, num)                   
smu_ppt_funcs(get_enabled_mask, 0, smu, mask, num)
 #define smu_feature_is_enabled(smu, mask)                              
smu_ppt_funcs(feature_is_enabled, 0, smu, mask)
+#define smu_disable_all_features_with_exception(smu, mask)             
smu_ppt_funcs(disable_all_features_with_exception, 0, smu, mask)
 #define smu_is_dpm_running(smu)                                                
smu_ppt_funcs(is_dpm_running, 0 , smu)
 #define smu_notify_display_change(smu)                                 
smu_ppt_funcs(notify_display_change, 0, smu)
 #define smu_set_default_dpm_table(smu)                                 
smu_ppt_funcs(set_default_dpm_table, 0, smu)
-- 
2.27.0

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to