From: Wenjing Liu <wenjing....@amd.com>
[why]
The capability fields are reserved for DSC branch
only to report the capability related to the
branch's DSC decoder.
Signed-off-by: Wenjing Liu <wenjing....@amd.com>
Reviewed-by: Tony Cheng <tony.ch...@amd.com>
Acked-by: Qingqing Zhuo <qingqing.z...@amd.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 ++--
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 4 ++--
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 10 +++++-----
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index f46db2f3c620..7d78205d3604 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4621,7 +4621,7 @@ create_stream_for_sink(struct amdgpu_dm_connector
*aconnector,
#if defined(CONFIG_DRM_AMD_DC_DCN)
dc_dsc_parse_dsc_dpcd(aconnector->dc_link->ctx->dc,
aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,
-
aconnector->dc_link->dpcd_caps.dsc_caps.dsc_ext_caps.raw,
+
aconnector->dc_link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw,
&dsc_caps);
#endif
link_bandwidth_kbps =
dc_link_bandwidth_kbps(aconnector->dc_link,
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 31c0b35bab67..277b29590fb9 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -3519,8 +3519,8 @@ static bool retrieve_link_cap(struct dc_link *link)
status = core_link_read_dpcd(
link,
DP_DSC_BRANCH_OVERALL_THROUGHPUT_0,
- link->dpcd_caps.dsc_caps.dsc_ext_caps.raw,
-
sizeof(link->dpcd_caps.dsc_caps.dsc_ext_caps.raw));
+
link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw,
+
sizeof(link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw));
}
if (!dpcd_read_sink_ext_caps(link))
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index af177c087d3b..a8a3b0643505 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -726,7 +726,7 @@ union dpcd_dsc_basic_capabilities {
uint8_t raw[16];
};
-union dpcd_dsc_ext_capabilities {
+union dpcd_dsc_branch_decoder_capabilities {
struct {
uint8_t BRANCH_OVERALL_THROUGHPUT_0;
uint8_t BRANCH_OVERALL_THROUGHPUT_1;
@@ -737,7 +737,7 @@ union dpcd_dsc_ext_capabilities {
struct dpcd_dsc_capabilities {
union dpcd_dsc_basic_capabilities dsc_basic_caps;
- union dpcd_dsc_ext_capabilities dsc_ext_caps;
+ union dpcd_dsc_branch_decoder_capabilities dsc_branch_decoder_caps;
};
/* These parameters are from PSR capabilities reported by Sink DPCD */
diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
index 0c7f247bb7de..8cdaa6eef5d3 100644
--- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
@@ -747,7 +747,7 @@ static bool setup_dsc_config(
return is_dsc_possible;
}
-bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const uint8_t
*dpcd_dsc_basic_data, const uint8_t *dpcd_dsc_ext_data, struct
dsc_dec_dpcd_caps *dsc_sink_caps)
+bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const uint8_t
*dpcd_dsc_basic_data, const uint8_t *dpcd_dsc_branch_decoder_caps, struct
dsc_dec_dpcd_caps *dsc_sink_caps)
{
if (!dpcd_dsc_basic_data)
return false;
@@ -818,14 +818,14 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const
uint8_t *dpcd_dsc_basic_da
}
/* Extended caps */
- if (dpcd_dsc_ext_data == NULL) { // Extended DPCD DSC data can be null,
e.g. because it doesn't apply to SST
+ if (dpcd_dsc_branch_decoder_caps == NULL) { // branch decoder DPCD DSC
data can be null for non branch device
dsc_sink_caps->branch_overall_throughput_0_mps = 0;
dsc_sink_caps->branch_overall_throughput_1_mps = 0;
dsc_sink_caps->branch_max_line_width = 0;
return true;
}
- dsc_sink_caps->branch_overall_throughput_0_mps =
dpcd_dsc_ext_data[DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 -
DP_DSC_BRANCH_OVERALL_THROUGHPUT_0];
+ dsc_sink_caps->branch_overall_throughput_0_mps =
dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 -
DP_DSC_BRANCH_OVERALL_THROUGHPUT_0];
if (dsc_sink_caps->branch_overall_throughput_0_mps == 0)
dsc_sink_caps->branch_overall_throughput_0_mps = 0;
else if (dsc_sink_caps->branch_overall_throughput_0_mps == 1)
@@ -835,7 +835,7 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const
uint8_t *dpcd_dsc_basic_da
dsc_sink_caps->branch_overall_throughput_0_mps += 600;
}
- dsc_sink_caps->branch_overall_throughput_1_mps =
dpcd_dsc_ext_data[DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 -
DP_DSC_BRANCH_OVERALL_THROUGHPUT_0];
+ dsc_sink_caps->branch_overall_throughput_1_mps =
dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 -
DP_DSC_BRANCH_OVERALL_THROUGHPUT_0];
if (dsc_sink_caps->branch_overall_throughput_1_mps == 0)
dsc_sink_caps->branch_overall_throughput_1_mps = 0;
else if (dsc_sink_caps->branch_overall_throughput_1_mps == 1)
@@ -845,7 +845,7 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const
uint8_t *dpcd_dsc_basic_da
dsc_sink_caps->branch_overall_throughput_1_mps += 600;
}
- dsc_sink_caps->branch_max_line_width =
dpcd_dsc_ext_data[DP_DSC_BRANCH_MAX_LINE_WIDTH -
DP_DSC_BRANCH_OVERALL_THROUGHPUT_0] * 320;
+ dsc_sink_caps->branch_max_line_width =
dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_MAX_LINE_WIDTH -
DP_DSC_BRANCH_OVERALL_THROUGHPUT_0] * 320;
ASSERT(dsc_sink_caps->branch_max_line_width == 0 ||
dsc_sink_caps->branch_max_line_width >= 5120);
return true;
--
2.17.1
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