As VCN related dpm table setup needs VCN be in PG ungate state. Same logics applies to JPEG.
Change-Id: I94335efc4e0424cfe0991e984c938998fd8f1287 Signed-off-by: Evan Quan <[email protected]> --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 38 +++++++++++++++++----- 1 file changed, 30 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index 85b04c48bd09..1349d05c5f3d 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -134,7 +134,8 @@ int smu_get_dpm_freq_range(struct smu_context *smu, } static int smu_dpm_set_vcn_enable(struct smu_context *smu, - bool enable) + bool enable, + int *previous_pg_state) { struct smu_power_context *smu_power = &smu->smu_power; struct smu_power_gate *power_gate = &smu_power->power_gate; @@ -148,6 +149,9 @@ static int smu_dpm_set_vcn_enable(struct smu_context *smu, if (atomic_read(&power_gate->vcn_gated) ^ enable) goto out; + if (previous_pg_state) + *previous_pg_state = atomic_read(&power_gate->vcn_gated); + ret = smu->ppt_funcs->dpm_set_vcn_enable(smu, enable); if (!ret) atomic_set(&power_gate->vcn_gated, !enable); @@ -159,7 +163,8 @@ static int smu_dpm_set_vcn_enable(struct smu_context *smu, } static int smu_dpm_set_jpeg_enable(struct smu_context *smu, - bool enable) + bool enable, + int *previous_pg_state) { struct smu_power_context *smu_power = &smu->smu_power; struct smu_power_gate *power_gate = &smu_power->power_gate; @@ -173,6 +178,9 @@ static int smu_dpm_set_jpeg_enable(struct smu_context *smu, if (atomic_read(&power_gate->jpeg_gated) ^ enable) goto out; + if (previous_pg_state) + *previous_pg_state = atomic_read(&power_gate->jpeg_gated); + ret = smu->ppt_funcs->dpm_set_jpeg_enable(smu, enable); if (!ret) atomic_set(&power_gate->jpeg_gated, !enable); @@ -212,7 +220,7 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type, */ case AMD_IP_BLOCK_TYPE_UVD: case AMD_IP_BLOCK_TYPE_VCN: - ret = smu_dpm_set_vcn_enable(smu, !gate); + ret = smu_dpm_set_vcn_enable(smu, !gate, NULL); if (ret) dev_err(smu->adev->dev, "Failed to power %s VCN!\n", gate ? "gate" : "ungate"); @@ -230,7 +238,7 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type, gate ? "gate" : "ungate"); break; case AMD_IP_BLOCK_TYPE_JPEG: - ret = smu_dpm_set_jpeg_enable(smu, !gate); + ret = smu_dpm_set_jpeg_enable(smu, !gate, NULL); if (ret) dev_err(smu->adev->dev, "Failed to power %s JPEG!\n", gate ? "gate" : "ungate"); @@ -407,6 +415,7 @@ static int smu_late_init(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct smu_context *smu = &adev->smu; + int vcn_gate, jpeg_gate; int ret = 0; if (!smu->pm_enabled) @@ -418,6 +427,14 @@ static int smu_late_init(void *handle) return ret; } + /* + * 1. Power up VCN/JPEG as the succeeding smu_set_default_dpm_table() + * needs VCN/JPEG up. + * 2. Save original gate states and then we can restore back afterwards. + */ + smu_dpm_set_vcn_enable(smu, true, &vcn_gate); + smu_dpm_set_jpeg_enable(smu, true, &jpeg_gate); + /* * Set initialized values (get from vbios) to dpm tables context such as * gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each @@ -429,6 +446,11 @@ static int smu_late_init(void *handle) return ret; } + /* Restore back to original VCN/JPEG power gate states */ + smu_dpm_set_vcn_enable(smu, !vcn_gate, NULL); + smu_dpm_set_jpeg_enable(smu, !vcn_gate, NULL); + + ret = smu_populate_umd_state_clk(smu); if (ret) { dev_err(adev->dev, "Failed to populate UMD state clocks!\n"); @@ -991,8 +1013,8 @@ static int smu_hw_init(void *handle) if (smu->is_apu) { smu_powergate_sdma(&adev->smu, false); - smu_dpm_set_vcn_enable(smu, true); - smu_dpm_set_jpeg_enable(smu, true); + smu_dpm_set_vcn_enable(smu, true, NULL); + smu_dpm_set_jpeg_enable(smu, true, NULL); smu_set_gfx_cgpg(&adev->smu, true); } @@ -1132,8 +1154,8 @@ static int smu_hw_fini(void *handle) if (smu->is_apu) { smu_powergate_sdma(&adev->smu, true); - smu_dpm_set_vcn_enable(smu, false); - smu_dpm_set_jpeg_enable(smu, false); + smu_dpm_set_vcn_enable(smu, false, NULL); + smu_dpm_set_jpeg_enable(smu, false, NULL); } if (!smu->pm_enabled) -- 2.28.0 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
