[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Evan Quan <[email protected]>
-----Original Message----- From: amd-gfx <[email protected]> On Behalf Of Alex Deucher Sent: Tuesday, October 27, 2020 5:34 AM To: [email protected] Cc: Deucher, Alexander <[email protected]> Subject: [PATCH] drm/amdgpu/swsmu: drop smu i2c bus on navi1x Stop registering the SMU i2c bus on navi1x. This leads to instability issues when userspace processes mess with the bus and also seems to cause display stability issues in some cases. Bug: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1314&data=04%7C01%7Cevan.quan%40amd.com%7C88fb81ab5bca450f536608d879f6d938%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637393448423758226%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=WmOflcFg8%2BVk3%2F4Qr8H4wwgNKWgirGBq24aBayHU6%2F4%3D&reserved=0 Bug: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1341&data=04%7C01%7Cevan.quan%40amd.com%7C88fb81ab5bca450f536608d879f6d938%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637393448423758226%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=8Cx34yYo7MsoewcJMmR5fmtO%2FAlP9jric871bwL5vjA%3D&reserved=0 Signed-off-by: Alex Deucher <[email protected]> --- .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 25 ------------------- 1 file changed, 25 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c index 8d8081c6bd38..9cf97744b67e 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c @@ -2534,29 +2534,6 @@ static const struct i2c_algorithm navi10_i2c_algo = { .functionality = navi10_i2c_func, }; -static int navi10_i2c_control_init(struct smu_context *smu, struct i2c_adapter *control) -{ -struct amdgpu_device *adev = to_amdgpu_device(control); -int res; - -control->owner = THIS_MODULE; -control->class = I2C_CLASS_SPD; -control->dev.parent = &adev->pdev->dev; -control->algo = &navi10_i2c_algo; -snprintf(control->name, sizeof(control->name), "AMDGPU SMU"); - -res = i2c_add_adapter(control); -if (res) -DRM_ERROR("Failed to register hw i2c, err: %d\n", res); - -return res; -} - -static void navi10_i2c_control_fini(struct smu_context *smu, struct i2c_adapter *control) -{ -i2c_del_adapter(control); -} - static ssize_t navi10_get_gpu_metrics(struct smu_context *smu, void **table) { @@ -2687,8 +2664,6 @@ static const struct pptable_funcs navi10_ppt_funcs = { .set_default_dpm_table = navi10_set_default_dpm_table, .dpm_set_vcn_enable = navi10_dpm_set_vcn_enable, .dpm_set_jpeg_enable = navi10_dpm_set_jpeg_enable, -.i2c_init = navi10_i2c_control_init, -.i2c_fini = navi10_i2c_control_fini, .print_clk_levels = navi10_print_clk_levels, .force_clk_levels = navi10_force_clk_levels, .populate_umd_state_clk = navi10_populate_umd_state_clk, -- 2.25.4 _______________________________________________ amd-gfx mailing list [email protected] https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Cevan.quan%40amd.com%7C88fb81ab5bca450f536608d879f6d938%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637393448423758226%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=bZIRGI7eSmTxNQ2NXtbzKmqra0vsUvNRSST13iw%2BNNA%3D&reserved=0 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
