RE: [PATCH] drm/amd/pm: change the baco parameter

[Gao, Likun]

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Likun Gao <likun....@amd.com>

Regards,
Likun

-----Original Message-----
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Kenneth Feng
Sent: Monday, November 16, 2020 4:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth <kenneth.f...@amd.com>
Subject: [PATCH] drm/amd/pm: change the baco parameter

For some products, baco parameter 1 is dummy and this doesn't trigger the baco 
entry/exit.
Parameter 0 is valid and these products don't depend on ras for baco sequence.

Signed-off-by: Kenneth Feng <kenneth.f...@amd.com>
---
 .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c    | 24 +++++++++++++------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index b6453ee6f8e6..3e1a3cf44a69 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1495,15 +1495,25 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, 
enum smu_baco_state state)
        mutex_lock(&smu_baco->mutex);
 
        if (state == SMU_BACO_STATE_ENTER) {
-               if (!ras || !ras->supported) {
-                       data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
-                       data |= 0x80000000;
-                       WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
-
+               switch (adev->asic_type) {
+               case CHIP_SIENNA_CICHLID:
+               case CHIP_NAVY_FLOUNDER:
+               case CHIP_DIMGREY_CAVEFISH:
                        ret = smu_cmn_send_smc_msg_with_param(smu, 
SMU_MSG_EnterBaco, 0, NULL);
-               } else {
-                       ret = smu_cmn_send_smc_msg_with_param(smu, 
SMU_MSG_EnterBaco, 1, NULL);
+                       break;
+               default:
+                       if (!ras || !ras->supported) {
+                               data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
+                               data |= 0x80000000;
+                               WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
+
+                               ret = smu_cmn_send_smc_msg_with_param(smu, 
SMU_MSG_EnterBaco, 0, NULL);
+                       } else {
+                         ret = smu_cmn_send_smc_msg_with_param(smu, 
SMU_MSG_EnterBaco, 1, NULL);
+                       }
+                       break;
                }
+
        } else {
                ret = smu_cmn_send_smc_msg(smu, SMU_MSG_ExitBaco, NULL);
                if (ret)
-- 
2.17.1

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