This is may be required for proper gfxoff operation with
SDMA workloads.
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index b208b81005bb..2699b8ea82ed 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
@@ -810,6 +810,15 @@ static int sdma_v5_0_gfx_resume(struct amdgpu_device *adev)
*/
static int sdma_v5_0_rlc_resume(struct amdgpu_device *adev)
{
+ int i;
+ u32 sdma_cntl;
+
+ for (i = 0; i < adev->sdma.num_instances; i++) {
+ sdma_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i,
mmSDMA0_CNTL));
+ sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL,
CTXEMPTY_INT_ENABLE, 1);
+ WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL),
sdma_cntl);
+ }
+
return 0;
}
--
2.25.4
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