Fulfill the 2nd usb2.0 port workaround for sienna cichlid.
Change-Id: I912660ee590e9ce352a20bbdf8903a61f88cd59e
Signed-off-by: Evan Quan <[email protected]>
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 47d4f92d5ead..48b9787cfb78 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -3247,6 +3247,30 @@ static int sienna_cichlid_gpo_control(struct smu_context
*smu,
return ret;
}
+
+static int sienna_cichlid_notify_2nd_usb20_port(struct smu_context *smu)
+{
+ uint32_t smu_version;
+ int ret = 0;
+
+ ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+ if (ret)
+ return ret;
+
+ /*
+ * Message SMU_MSG_Enable2ndUSB20Port is supported by 58.45
+ * onwards PMFWs.
+ */
+ if (smu_version < 0x003A2D00)
+ return 0;
+
+ return smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_Enable2ndUSB20Port,
+
smu->smu_table.boot_values.firmware_caps &
ATOM_FIRMWARE_CAP_ENABLE_2ND_USB20PORT ?
+ 1 : 0,
+ NULL);
+}
+
static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,
.set_default_dpm_table = sienna_cichlid_set_default_dpm_table,
@@ -3332,6 +3356,7 @@ static const struct pptable_funcs
sienna_cichlid_ppt_funcs = {
.get_fan_parameters = sienna_cichlid_get_fan_parameters,
.interrupt_work = smu_v11_0_interrupt_work,
.gpo_control = sienna_cichlid_gpo_control,
+ .notify_2nd_usb20_port = sienna_cichlid_notify_2nd_usb20_port,
};
void sienna_cichlid_set_ppt_funcs(struct smu_context *smu)
--
2.29.0
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