Hi, Hawking,
      Agree with your suggestion, and it could further simplify our codes. I 
will refactor them again. 

Best Regards
Dennis Li
-----Original Message-----
From: Zhang, Hawking <hawking.zh...@amd.com> 
Sent: Friday, February 26, 2021 12:30 PM
To: Li, Dennis <dennis...@amd.com>; amd-gfx@lists.freedesktop.org; Chen, Guchun 
<guchun.c...@amd.com>; Koenig, Christian <christian.koe...@amd.com>
Cc: Li, Dennis <dennis...@amd.com>
Subject: RE: [PATCH] drm/amdgpu: remove unnecessary reading for epprom header

[AMD Public Use]

What about merge this function with amdgpu_ras_check_err_threshold?

Regards,
Hawking

-----Original Message-----
From: Dennis Li <dennis...@amd.com> 
Sent: Friday, February 26, 2021 09:26
To: amd-gfx@lists.freedesktop.org; Chen, Guchun <guchun.c...@amd.com>; Zhang, 
Hawking <hawking.zh...@amd.com>; Koenig, Christian <christian.koe...@amd.com>
Cc: Li, Dennis <dennis...@amd.com>
Subject: [PATCH] drm/amdgpu: remove unnecessary reading for epprom header

If the number of badpage records exceed the threshold, driver has updated both 
epprom header and control->tbl_hdr.header before gpu reset, therefore GPU 
recovery thread no need to read epprom header directly.

Signed-off-by: Dennis Li <dennis...@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 19d9aa76cfbf..4310ad63890c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -439,41 +439,19 @@ int amdgpu_ras_eeprom_check_err_threshold(
                                bool *exceed_err_limit)
 {
        struct amdgpu_device *adev = to_amdgpu_device(control);
-       unsigned char buff[EEPROM_ADDRESS_SIZE +
-                       EEPROM_TABLE_HEADER_SIZE] = { 0 };
-       struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;
-       struct i2c_msg msg = {
-                       .addr = control->i2c_address,
-                       .flags = I2C_M_RD,
-                       .len = EEPROM_ADDRESS_SIZE + EEPROM_TABLE_HEADER_SIZE,
-                       .buf = buff,
-       };
-       int ret;
 
        *exceed_err_limit = false;
 
        if (!__is_ras_eeprom_supported(adev))
                return 0;
 
-       /* read EEPROM table header */
-       mutex_lock(&control->tbl_mutex);
-       ret = i2c_transfer(&adev->pm.smu_i2c, &msg, 1);
-       if (ret < 1) {
-               dev_err(adev->dev, "Failed to read EEPROM table header.\n");
-               goto err;
-       }
-
-       __decode_table_header_from_buff(hdr, &buff[2]);
-
-       if (hdr->header == EEPROM_TABLE_HDR_BAD) {
+       if (control->tbl_hdr.header == EEPROM_TABLE_HDR_BAD) {
                dev_warn(adev->dev, "This GPU is in BAD status.");
                dev_warn(adev->dev, "Please retire it or setting one bigger "
                                "threshold value when reloading driver.\n");
                *exceed_err_limit = true;
        }
 
-err:
-       mutex_unlock(&control->tbl_mutex);
        return 0;
 }
 
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to