[AMD Public Use] Same can be done for pcie_write also.
Reviewed-by: Lijo Lazar <[email protected]> -----Original Message----- From: Wang, Kevin(Yang) <[email protected]> Sent: Tuesday, March 2, 2021 1:34 PM To: [email protected] Cc: Zhang, Hawking <[email protected]>; Lazar, Lijo <[email protected]>; Wang, Kevin(Yang) <[email protected]> Subject: [PATCH] drm/amdgpu: fix parameter error of RREG32_PCIE() in amdgpu_regs_pcie the register offset isn't needed division by 4 to pass RREG32_PCIE() Signed-off-by: Kevin Wang <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c index a09469f84251..f3434a6f120f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c @@ -317,7 +317,7 @@ static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf, while (size) { uint32_t value; - value = RREG32_PCIE(*pos >> 2); + value = RREG32_PCIE(*pos); r = put_user(value, (uint32_t *)buf); if (r) { pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); -- 2.17.1 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
