Rather than hardcoding it.

v2: squash in checks for SDMA3,4 (Guchun)

Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 572a634f7a1e..9e59fb792643 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -348,6 +348,11 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device 
*adev)
 
                        if (le16_to_cpu(ip->hw_id) == VCN_HWID)
                                adev->vcn.num_vcn_inst++;
+                       if (le16_to_cpu(ip->hw_id) == SDMA0_HWID ||
+                           le16_to_cpu(ip->hw_id) == SDMA1_HWID ||
+                           le16_to_cpu(ip->hw_id) == SDMA2_HWID ||
+                           le16_to_cpu(ip->hw_id) == SDMA3_HWID)
+                               adev->sdma.num_instances++;
 
                        for (k = 0; k < num_base_address; k++) {
                                /*
@@ -515,6 +520,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device 
*adev)
        switch (adev->asic_type) {
        case CHIP_VEGA10:
                vega10_reg_base_init(adev);
+               adev->sdma.num_instances = 2;
                adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 0, 0);
                adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 0, 0);
                adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 0, 0);
@@ -534,6 +540,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device 
*adev)
                break;
        case CHIP_VEGA12:
                vega10_reg_base_init(adev);
+               adev->sdma.num_instances = 2;
                adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 3, 0);
                adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 3, 0);
                adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 0, 1);
@@ -553,6 +560,8 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device 
*adev)
                break;
        case CHIP_RAVEN:
                vega10_reg_base_init(adev);
+               adev->sdma.num_instances = 1;
+               adev->vcn.num_vcn_inst = 1;
                if (adev->apu_flags & AMD_APU_IS_RAVEN2) {
                        adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 2, 0);
                        adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 2, 0);
@@ -589,6 +598,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device 
*adev)
                break;
        case CHIP_VEGA20:
                vega20_reg_base_init(adev);
+               adev->sdma.num_instances = 2;
                adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 4, 0);
                adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 4, 0);
                adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 2, 0);
@@ -608,6 +618,8 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device 
*adev)
                break;
        case CHIP_ARCTURUS:
                arct_reg_base_init(adev);
+               adev->sdma.num_instances = 8;
+               adev->vcn.num_vcn_inst = 2;
                adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 4, 1);
                adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 4, 1);
                adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 2, 1);
@@ -625,6 +637,8 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device 
*adev)
                break;
        case CHIP_ALDEBARAN:
                aldebaran_reg_base_init(adev);
+               adev->sdma.num_instances = 5;
+               adev->vcn.num_vcn_inst = 2;
                adev->ip_versions[MMHUB_HWIP] = IP_VERSION(9, 4, 2);
                adev->ip_versions[ATHUB_HWIP] = IP_VERSION(9, 4, 2);
                adev->ip_versions[OSSSYS_HWIP] = IP_VERSION(4, 4, 0);
-- 
2.31.1

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