[Public]

Hi all,
 
This week this patchset was tested on the following systems:
 
HP Envy 360, with Ryzen 5 4500U, with the following display types: eDP 1080p 
60hz, 4k 60hz  (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 
1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
 
AMD Ryzen 9 5900H, with the following display types: eDP 1080p 60hz, 4k 60hz  
(via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via 
USB-C to DP and then DP to DVI/VGA)
 
Sapphire Pulse RX5700XT with the following display types:
4k 60hz  (via DP/HDMI), 1440p 144hz (via DP/HDMI), 1680*1050 60hz (via DP to 
DVI/VGA)
 
Reference AMD RX6800 with the following display types:
4k 60hz  (via DP/HDMI and USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI 
and USB-C to DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
 
Included testing using a Startech DP 1.4 MST hub at 2x 4k 60hz, and 3x 1080p 
60hz on all systems. Also tested DSC via USB-C to DP DSC Hub with 3x 4k 60hz on 
Ryzen 9 5900h and Ryzen 5 4500u.
 
Tested on Ubuntu 20.04.3 with Kernel Version 5.13 and ChromeOS
 
Tested-by: Daniel Wheeler <[email protected]>
 
 
Thank you,
 
Dan Wheeler
Technologist  |  AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
Facebook |  Twitter |  amd.com  

-----Original Message-----
From: amd-gfx <[email protected]> On Behalf Of Aurabindo 
Pillai
Sent: October 29, 2021 11:15 AM
To: [email protected]
Cc: Wentland, Harry <[email protected]>; Li, Sun peng (Leo) 
<[email protected]>; Lakha, Bhawanpreet <[email protected]>; Siqueira, 
Rodrigo <[email protected]>; Pillai, Aurabindo 
<[email protected]>; Zhuo, Qingqing <[email protected]>; Lipski, 
Mikita <[email protected]>; Li, Roman <[email protected]>; Jacob, Anson 
<[email protected]>; Lin, Wayne <[email protected]>; Wang, Chao-kai (Stylon) 
<[email protected]>; Chiu, Solomon <[email protected]>; Kotarac, Pavle 
<[email protected]>; Gutierrez, Agustin <[email protected]>
Subject: [PATCH 00/14] DC patches for Nov 1, 2021

This DC patchset brings improvements in multiple areas. In summary, we 
highlight:

* DC release version 3.2.160
* DMUB fw version 0.0.91 and bug fixes
* DSC related fixes
* Minor power optimization improvements
* Bug fixes and improvements in display pipeline

-------------------------------

Anson Jacob (1):
  drm/amd/display: Fix dcn10_log_hubp_states printf format string

Anthony Koo (1):
  drm/amd/display: [FW Promotion] Release 0.0.91

Aric Cyr (1):
  drm/amd/display: 3.2.160

Aurabindo Pillai (1):
  drm/amd/display: add condition check for dmub notification

Bing Guo (1):
  drm/amd/display: Fix bpc calculation for specific encodings

Felipe Clark (1):
  drm/amd/display: Fix dummy p-state hang on monitors with extreme
    timing

Hersen Wu (1):
  drm/amd/display: dsc engine not disabled after unplug dsc mst hub

Jake Wang (3):
  drm/amd/display: Added HPO HW control shutdown support
  drm/amd/display: Add MPC meory shutdown support
  drm/amd/display: Added new DMUB boot option for power optimization

Jimmy Kizito (1):
  drm/amd/display: Clear encoder assignments when state cleared.

Roman Li (1):
  drm/amd/display: Force disable planes on any pipe split change

Wenjing Liu (1):
  drm/amd/display: fix register write sequence for LINK_SQUARE_PATTERN

Yu-ting Shen (1):
  drm/amd/display: avoid link loss short pulse stuck the system

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  31 ++--
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   | 150 ++++++++++++++----
 drivers/gpu/drm/amd/display/dc/core/dc.c      |   8 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link.c |   2 +
 .../gpu/drm/amd/display/dc/core/dc_link_dp.c  |   8 +
 .../drm/amd/display/dc/core/dc_link_enc_cfg.c |  22 +++
 drivers/gpu/drm/amd/display/dc/dc.h           |   3 +-
 drivers/gpu/drm/amd/display/dc/dc_dp_types.h  |   3 +
 .../gpu/drm/amd/display/dc/dce/dce_hwseq.h    |   4 +-
 .../display/dc/dce110/dce110_hw_sequencer.c   |   6 +
 .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |   2 +-
 .../drm/amd/display/dc/dcn20/dcn20_hwseq.c    |   3 +
 .../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c  |   7 +-
 .../drm/amd/display/dc/dcn30/dcn30_resource.c |   7 +-
 .../drm/amd/display/dc/dcn31/dcn31_hwseq.c    |  78 +++++----
 .../drm/amd/display/dc/dcn31/dcn31_hwseq.h    |   1 +
 .../gpu/drm/amd/display/dc/dcn31/dcn31_init.c |   1 +
 .../drm/amd/display/dc/dcn31/dcn31_resource.c |   6 +-
 .../dc/dml/dcn30/display_mode_vba_30.c        |  13 +-
 .../dc/dml/dcn31/display_mode_vba_31.c        |  14 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h   |   1 +
 .../amd/display/dc/inc/hw_sequencer_private.h |   1 +
 drivers/gpu/drm/amd/display/dmub/dmub_srv.h   |   1 +
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |   4 +-
 .../gpu/drm/amd/display/dmub/src/dmub_dcn31.c |   1 +
 25 files changed, 271 insertions(+), 106 deletions(-)

-- 
2.30.2

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