[AMD Official Use Only] Reviewed-by: Evan Quan <[email protected]>
> -----Original Message----- > From: Liang, Prike <[email protected]> > Sent: Tuesday, December 14, 2021 11:17 AM > To: [email protected] > Cc: Deucher, Alexander <[email protected]>; Huang, Ray > <[email protected]>; Quan, Evan <[email protected]>; Limonciello, > Mario <[email protected]>; Liang, Prike <[email protected]> > Subject: [PATCH v2] drm/amd/pm: skip setting gfx cgpg in the s0ix suspend- > resume > > In the s0ix entry need retain gfx in the gfxoff state,so here need't > set gfx cgpg in the S0ix suspend-resume process. Moreover move the S0ix > check into SMU12 can simplify the code condition check. > > Signed-off-by: Prike Liang <[email protected]> > --- > v1->v2: > - Move s0ix check into SMU12. > --- > drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 ++----- > drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c | 3 ++- > 2 files changed, 4 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > index 2d718c30c8eb..af98fa140d83 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c > @@ -1569,9 +1569,7 @@ static int smu_suspend(void *handle) > > smu->watermarks_bitmap &= ~(WATERMARKS_LOADED); > > - /* skip CGPG when in S0ix */ > - if (smu->is_apu && !adev->in_s0ix) > - smu_set_gfx_cgpg(&adev->smu, false); > + smu_set_gfx_cgpg(&adev->smu, false); > > return 0; > } > @@ -1602,8 +1600,7 @@ static int smu_resume(void *handle) > return ret; > } > > - if (smu->is_apu) > - smu_set_gfx_cgpg(&adev->smu, true); > + smu_set_gfx_cgpg(&adev->smu, true); > > smu->disable_uclk_switch = 0; > > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c > b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c > index d60b8c5e8715..1ae59f2321b2 100644 > --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c > @@ -120,7 +120,8 @@ int smu_v12_0_powergate_sdma(struct smu_context > *smu, bool gate) > > int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable) > { > - if (!(smu->adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) > + /* Until now the SMU12 only implemented for Renoir series so here > neen't do APU check. */ > + if (!(smu->adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) || smu- > >adev->in_s0ix) > return 0; > > return smu_cmn_send_smc_msg_with_param(smu, > -- > 2.17.1
