[Public] Hi Alex,
Thanks for clarification. The patch is: Reviewed-by: Guchun Chen <[email protected]> . My concern is that amdgpu_device_has_dc_support is called at multiple places. Before this patch, for ARCTURUS and ALDEBARAN, it goes to default case, and returns true by default, but hardcoded IP discovery setting guarantees no DC is initialized on those two, so far, it's fine. However, after this patch, amdgpu_device_has_dc_support will explicitly return false, and accordingly it changed some setting/execution like driver_feature or in suspend/resume. I am not pretty sure about the impact. Anyway, we can re-visit it if there is regression. Regards, Guchun -----Original Message----- From: Alex Deucher <[email protected]> Sent: Friday, December 24, 2021 2:16 PM To: Chen, Guchun <[email protected]> Cc: Deucher, Alexander <[email protected]>; [email protected]; [email protected] Subject: Re: [PATCH] drm/amdgpu: no DC support for headless chips On Thu, Dec 23, 2021 at 9:54 PM Chen, Guchun <[email protected]> wrote: > > [Public] > > For the first two CHIP_HAINAN and CHIP_TOPAZ, using asic_type is fine. But > for CHIP_ARCTURUS and CHIP_ALDEBARAN, I wonder if there is any dc hardware > harvesting info carried by harvest table in VBIOS. If that's the case, I > think we can drop these two, as we can promise it by checking > AMD_HARVEST_IP_DMU_MASK in amdgpu_device_has_dc_support. There is no IP discovery table for these chips, but they don't have any display IPs in the hardcoded IP discovery info in the driver. I don't think this should affect them, but I wasn't sure.. Alex > > Regards, > Guchun > > -----Original Message----- > From: amd-gfx <[email protected]> On Behalf Of > Alex Deucher > Sent: Friday, December 24, 2021 3:20 AM > To: [email protected] > Cc: Deucher, Alexander <[email protected]>; > [email protected] > Subject: [PATCH] drm/amdgpu: no DC support for headless chips > > Chips with no display hardware should return false for DC support. > > Fixes: f7f12b25823c0d ("drm/amdgpu: default to true in > amdgpu_device_asic_has_dc_support") > Signed-off-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index 9dc86c5a1cad..58e2034984de 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -3166,6 +3166,14 @@ static void amdgpu_device_detect_sriov_bios(struct > amdgpu_device *adev) bool amdgpu_device_asic_has_dc_support(enum > amd_asic_type asic_type) { > switch (asic_type) { > +#ifdef CONFIG_DRM_AMDGPU_SI > + case CHIP_HAINAN: > +#endif > + case CHIP_TOPAZ: > + case CHIP_ARCTURUS: > + case CHIP_ALDEBARAN: > + /* chips with no display hardware */ > + return false; > #if defined(CONFIG_DRM_AMD_DC) > case CHIP_TAHITI: > case CHIP_PITCAIRN: > -- > 2.33.1
