Hi Kevin,
well at least the HDP flush function has to work correctly or otherwise
the driver won't work correctly.
If the registers are not accessible any more we need to find a proper
workaround for this.
One possibility would be to use the KIQ, another is a dummy write/read
to make sure the HDP is flushed (check the hardware docs).
The third option would be to question if blocking the HDP registers is
really a good idea.
The solution is up to you, but a workaround like proposed below doesn't
really help in any way.
Regards,
Christian.
Am 20.01.22 um 10:07 schrieb Wang, Yang(Kevin):
[AMD Official Use Only]
Hi Chris,
yes, I agree with your point.
and another way is that we can use KIQ to write HDP register to
resolve HDP can't R/W issue.
but it will cause some performance drop if use KIQ to programing register.
what is your ideas?
Best Regards,
Kevin
------------------------------------------------------------------------
*From:* Koenig, Christian <[email protected]>
*Sent:* Thursday, January 20, 2022 4:58 PM
*To:* Wang, Yang(Kevin) <[email protected]>;
[email protected] <[email protected]>;
Deucher, Alexander <[email protected]>; Liu, Monk
<[email protected]>
*Cc:* Min, Frank <[email protected]>; Chen, Horace <[email protected]>
*Subject:* Re: [PATCH] drm/amdgpu: force using sdma to update vm page
table when mmio is blocked
Well NAK.
Even when we can't R/W HDP registers we need a way to invalidate the
HDP or quite a bunch of functions won't work correctly.
Blocking CPU base page table updates only works around the symptoms,
but doesn't really solve anything.
Regards,
Christian.
Am 20.01.22 um 09:46 schrieb Wang, Yang(Kevin):
[AMD Official Use Only]
ping...
add @Liu, Monk <mailto:[email protected]> @Koenig, Christian
<mailto:[email protected]> @Deucher, Alexander
<mailto:[email protected]>
Best Regards,
Kevin
------------------------------------------------------------------------
*From:* Wang, Yang(Kevin) <[email protected]>
<mailto:[email protected]>
*Sent:* Wednesday, January 19, 2022 11:16 AM
*To:* [email protected]
<mailto:[email protected]>
<[email protected]> <mailto:[email protected]>
*Cc:* Min, Frank <[email protected]> <mailto:[email protected]>;
Chen, Horace <[email protected]> <mailto:[email protected]>;
Wang, Yang(Kevin) <[email protected]>
<mailto:[email protected]>
*Subject:* [PATCH] drm/amdgpu: force using sdma to update vm page
table when mmio is blocked
when mmio protection feature is enabled in hypervisor,
it will cause guest OS can't R/W HDP regiters,
and using cpu to update page table is not working well.
force using sdma to update page table when mmio is blocked.
Signed-off-by: Yang Wang <[email protected]>
<mailto:[email protected]>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index b23cb463b106..0f86f0b2e183 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2959,6 +2959,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev,
struct amdgpu_vm *vm)
vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
AMDGPU_VM_USE_CPU_FOR_GFX);
+ if (vm->use_cpu_for_update && amdgpu_sriov_vf(adev) &&
amdgpu_virt_mmio_blocked(adev))
+ vm->use_cpu_for_update = false;
+
DRM_DEBUG_DRIVER("VM update mode is %s\n",
vm->use_cpu_for_update ? "CPU" : "SDMA");
WARN_ONCE((vm->use_cpu_for_update &&
@@ -3094,6 +3097,10 @@ int amdgpu_vm_make_compute(struct
amdgpu_device *adev, struct amdgpu_vm *vm)
/* Update VM state */
vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
AMDGPU_VM_USE_CPU_FOR_COMPUTE);
+
+ if (vm->use_cpu_for_update && amdgpu_sriov_vf(adev) &&
amdgpu_virt_mmio_blocked(adev))
+ vm->use_cpu_for_update = false;
+
DRM_DEBUG_DRIVER("VM update mode is %s\n",
vm->use_cpu_for_update ? "CPU" : "SDMA");
WARN_ONCE((vm->use_cpu_for_update &&
--
2.25.1
