Re: [PATCH 1/3] drm/amdgpu: avoid gfx register accessing during gfxoff

[Lazar, Lijo]

On 9/21/2022 10:26 AM, Evan Quan wrote:

Make sure gfxoff is disabled before gfx register accessing.

Signed-off-by: Evan Quan <evan.q...@amd.com>

Series is -
        Reviewed-by: Lijo Lazar <lijo.la...@amd.com>

Thanks,
Lijo

Change-Id: Ia032869080f51cdefc6e6bad4f04405193ab0fec
---
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4 ++++
  1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index ce8c792cef1a..710074682279 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -5245,6 +5245,8 @@ static void gfx_v11_0_update_spm_vmid(struct 
amdgpu_device *adev, unsigned vmid)
  {
        u32 reg, data;

+ amdgpu_gfx_off_ctrl(adev, false);

+
        reg = SOC15_REG_OFFSET(GC, 0, regRLC_SPM_MC_CNTL);
        if (amdgpu_sriov_is_pp_one_vf(adev))
                data = RREG32_NO_KIQ(reg);
@@ -5258,6 +5260,8 @@ static void gfx_v11_0_update_spm_vmid(struct 
amdgpu_device *adev, unsigned vmid)
                WREG32_SOC15_NO_KIQ(GC, 0, regRLC_SPM_MC_CNTL, data);
        else
                WREG32_SOC15(GC, 0, regRLC_SPM_MC_CNTL, data);
+
+       amdgpu_gfx_off_ctrl(adev, true);
  }

static const struct amdgpu_rlc_funcs gfx_v11_0_rlc_funcs = {