On 10/6/2022 16:26, Qingqing Zhuo wrote:
From: Alvin Lee <alvin.l...@amd.com>
Watermark calculation was incorrect
due to missing brackets.
Reviewed-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
Acked-by: Qingqing Zhuo <qingqing.z...@amd.com>
Signed-off-by: Alvin Lee <alvin.l...@amd.com>
This just landed upstream for 6.0 and is a trivial fix for what the
intention was, it should go 6.0.y too.
Cc: sta...@vger.kernel.org # 6.0
Fixes: 85f4bc0c333c ("drm/amd/display: Add SubVP required code")
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index bbde635c56fc..0541e87e4f38 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -781,7 +781,7 @@ void dc_dmub_setup_subvp_dmub_command(struct dc *dc,
// Store the original watermark value for this SubVP config so
we can lower it when the
// MCLK switch starts
wm_val_refclk =
context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns *
- dc->res_pool->ref_clocks.dchub_ref_clock_inKhz
/ 1000 / 1000;
+ (dc->res_pool->ref_clocks.dchub_ref_clock_inKhz
/ 1000) / 1000;
cmd.fw_assisted_mclk_switch_v2.config_data.watermark_a_cache = wm_val_refclk < 0xFFFF ? wm_val_refclk : 0xFFFF;
}
