From: Artem Grishin <artem.gris...@amd.com>

[Why]
The latest eDP spec version 1.5 defines a new generic link
rate of 6.75 Gbps/Lane, which needs to be supported in the driver.

[How]
Added new element to the dc_link_rate enum

Reviewed-by: Charlene Liu <charlene....@amd.com>
Acked-by: Qingqing Zhuo <qingqing.z...@amd.com>
Signed-off-by: Artem Grishin <artem.gris...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dc_dp_types.h    | 17 +++++++++--------
 .../dc/link/protocols/link_dp_capability.c      |  5 ++++-
 .../dc/link/protocols/link_dp_training.c        |  3 +++
 3 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h 
b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index af53278662ec..49aab1924665 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -47,14 +47,15 @@ enum dc_lane_count {
  */
 enum dc_link_rate {
        LINK_RATE_UNKNOWN = 0,
-       LINK_RATE_LOW = 0x06,           // Rate_1 (RBR) - 1.62 Gbps/Lane
-       LINK_RATE_RATE_2 = 0x08,        // Rate_2               - 2.16 Gbps/Lane
-       LINK_RATE_RATE_3 = 0x09,        // Rate_3               - 2.43 Gbps/Lane
-       LINK_RATE_HIGH = 0x0A,          // Rate_4 (HBR) - 2.70 Gbps/Lane
-       LINK_RATE_RBR2 = 0x0C,          // Rate_5 (RBR2)- 3.24 Gbps/Lane
-       LINK_RATE_RATE_6 = 0x10,        // Rate_6               - 4.32 Gbps/Lane
-       LINK_RATE_HIGH2 = 0x14,         // Rate_7 (HBR2)- 5.40 Gbps/Lane
-       LINK_RATE_HIGH3 = 0x1E,         // Rate_8 (HBR3)- 8.10 Gbps/Lane
+       LINK_RATE_LOW = 0x06,           // Rate_1 (RBR)  - 1.62 Gbps/Lane
+       LINK_RATE_RATE_2 = 0x08,        // Rate_2        - 2.16 Gbps/Lane
+       LINK_RATE_RATE_3 = 0x09,        // Rate_3        - 2.43 Gbps/Lane
+       LINK_RATE_HIGH = 0x0A,          // Rate_4 (HBR)  - 2.70 Gbps/Lane
+       LINK_RATE_RBR2 = 0x0C,          // Rate_5 (RBR2) - 3.24 Gbps/Lane
+       LINK_RATE_RATE_6 = 0x10,        // Rate_6        - 4.32 Gbps/Lane
+       LINK_RATE_HIGH2 = 0x14,         // Rate_7 (HBR2) - 5.40 Gbps/Lane
+       LINK_RATE_RATE_8 = 0x19,        // Rate_8        - 6.75 Gbps/Lane
+       LINK_RATE_HIGH3 = 0x1E,         // Rate_9 (HBR3) - 8.10 Gbps/Lane
        /* Starting from DP2.0 link rate enum directly represents actual
         * link rate value in unit of 10 mbps
         */
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c 
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
index 2a2443535b67..7d7edbb2cf52 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
@@ -203,8 +203,11 @@ static enum dc_link_rate 
linkRateInKHzToLinkRateMultiplier(uint32_t link_rate_in
        case 5400000:
                link_rate = LINK_RATE_HIGH2;    // Rate_7 (HBR2)- 5.40 Gbps/Lane
                break;
+       case 6750000:
+               link_rate = LINK_RATE_RATE_8;   // Rate_8       - 6.75 Gbps/Lane
+               break;
        case 8100000:
-               link_rate = LINK_RATE_HIGH3;    // Rate_8 (HBR3)- 8.10 Gbps/Lane
+               link_rate = LINK_RATE_HIGH3;    // Rate_9 (HBR3)- 8.10 Gbps/Lane
                break;
        default:
                link_rate = LINK_RATE_UNKNOWN;
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c 
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
index 10261764a0ce..f301c9eaf2f9 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
@@ -86,6 +86,9 @@ void dp_log_training_result(
        case LINK_RATE_HIGH2:
                link_rate = "HBR2";
                break;
+       case LINK_RATE_RATE_8:
+               link_rate = "R8";
+               break;
        case LINK_RATE_HIGH3:
                link_rate = "HBR3";
                break;
-- 
2.34.1

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