From: Graham Sider <[email protected]>

Invalidate TLBs via a legacy flush request (flush_type=0) prior to the
heavyweight flush requests (flush_type=2) in gmc_v9_0.c. This is
temporarily required to mitigate a bug causing CPC UTCL1 to return stale
translations after invalidation requests in address range mode.

Signed-off-by: Graham Sider <[email protected]>
Reviewed-by: Philip Yang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index f000e0e89bd0..d28ffdb07ae6 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -833,6 +833,14 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device 
*adev, uint32_t vmid,
                 */
                inv_req = gmc_v9_0_get_invalidate_req(vmid, 2);
                inv_req2 = gmc_v9_0_get_invalidate_req(vmid, flush_type);
+       } else if (flush_type == 2 &&
+                  adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3)) {
+               /* FIXME: Temporarily add a legacy flush (type 0) before 
heavyweight
+                * flush for gfx943 to mitigate a bug which causes CPC UTCL1 to 
return
+                * stale translations even after TLB heavyweight flush.
+                */
+               inv_req = gmc_v9_0_get_invalidate_req(vmid, 0);
+               inv_req2 = gmc_v9_0_get_invalidate_req(vmid, flush_type);
        } else {
                inv_req = gmc_v9_0_get_invalidate_req(vmid, flush_type);
                inv_req2 = 0;
@@ -976,6 +984,15 @@ static int gmc_v9_0_flush_gpu_tlb_pasid(struct 
amdgpu_device *adev,
                if (vega20_xgmi_wa)
                        kiq->pmf->kiq_invalidate_tlbs(ring,
                                                      pasid, 2, all_hub);
+
+               /* FIXME: Temporarily add a legacy flush (type 0) before 
heavyweight
+                * flush for gfx943 to mitigate a bug which causes CPC UTCL1 to 
return
+                * stale translations even after TLB heavyweight flush.
+                */
+               if (flush_type == 2 && adev->ip_versions[GC_HWIP][0] == 
IP_VERSION(9, 4, 3))
+                       kiq->pmf->kiq_invalidate_tlbs(ring,
+                                               pasid, 0, all_hub);
+
                kiq->pmf->kiq_invalidate_tlbs(ring,
                                        pasid, flush_type, all_hub);
                r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT);
-- 
2.40.1

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