[AMD Official Use Only - General]

Acked-by: Hawking Zhang <[email protected]>

Regards,
Hawking
-----Original Message-----
From: amd-gfx <[email protected]> On Behalf Of Alex Deucher
Sent: Thursday, June 15, 2023 21:18
To: Deucher, Alexander <[email protected]>
Cc: [email protected]
Subject: Re: [PATCH] drm/amdgpu/atomfirmware: fix DDR5 width reporting

Ping?

On Mon, Jun 12, 2023 at 5:47 PM Alex Deucher <[email protected]> wrote:
>
> Ping?
>
> On Wed, Jun 7, 2023 at 12:46 PM Alex Deucher <[email protected]> 
> wrote:
> >
> > DDR5 channels are 32 bit rather than 64, report the width properly
> > in the log.
> >
> > Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2468
> > Signed-off-by: Alex Deucher <[email protected]>
> > ---
> >  .../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c  | 20
> > +++++++++++++------
> >  1 file changed, 14 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> > index ef4b9a41f20a..6b3bdc27f778 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> > @@ -327,10 +327,14 @@ amdgpu_atomfirmware_get_vram_info(struct 
> > amdgpu_device *adev,
> >                                         mem_channel_number = 
> > igp_info->v11.umachannelnumber;
> >                                         if (!mem_channel_number)
> >                                                 mem_channel_number = 1;
> > -                                       /* channel width is 64 */
> > -                                       if (vram_width)
> > -                                               *vram_width = 
> > mem_channel_number * 64;
> >                                         mem_type =
> > igp_info->v11.memorytype;
> > +                                       if ((mem_type == Ddr5MemType) ||
> > +                                           (mem_type == LpDdr5MemType))
> > +                                               mem_channel_width = 32;
> > +                                       else
> > +                                               mem_channel_width = 64;
> > +                                       if (vram_width)
> > +                                               *vram_width =
> > + mem_channel_number * mem_channel_width;
> >                                         if (vram_type)
> >                                                 *vram_type = 
> > convert_atom_mem_type_to_vram_type(adev, mem_type);
> >                                         break; @@ -345,10 +349,14 @@
> > amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
> >                                         mem_channel_number = 
> > igp_info->v21.umachannelnumber;
> >                                         if (!mem_channel_number)
> >                                                 mem_channel_number = 1;
> > -                                       /* channel width is 64 */
> > -                                       if (vram_width)
> > -                                               *vram_width = 
> > mem_channel_number * 64;
> >                                         mem_type =
> > igp_info->v21.memorytype;
> > +                                       if ((mem_type == Ddr5MemType) ||
> > +                                           (mem_type == LpDdr5MemType))
> > +                                               mem_channel_width = 32;
> > +                                       else
> > +                                               mem_channel_width = 64;
> > +                                       if (vram_width)
> > +                                               *vram_width =
> > + mem_channel_number * mem_channel_width;
> >                                         if (vram_type)
> >                                                 *vram_type = 
> > convert_atom_mem_type_to_vram_type(adev, mem_type);
> >                                         break;
> > --
> > 2.40.1
> >

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