+
+static void
+amdgpu_userqueue_setup_gfx(struct amdgpu_userq_mgr *uq_mgr)
+{
+ int maj;
+ struct amdgpu_device *adev = uq_mgr->adev;
+ uint32_t version = adev->ip_versions[GC_HWIP][0];
+
+ /* We support usermode queue only for GFX V11 as of now */
+ maj = IP_VERSION_MAJ(version);
+ if (maj == 11)
+ uq_mgr->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_gfx_v11_funcs;
+}
+
int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, struct
amdgpu_device *adev)
{
mutex_init(&userq_mgr->userq_mutex);
idr_init_base(&userq_mgr->userq_idr, 1);
userq_mgr->adev = adev;
+ amdgpu_userqueue_setup_gfx(userq_mgr);
return 0;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index c4940b6ea1c4..e76e1b86b434 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -30,6 +30,7 @@
#include "amdgpu_psp.h"
#include "amdgpu_smu.h"
#include "amdgpu_atomfirmware.h"
+#include "amdgpu_userqueue.h"
#include "imu_v11_0.h"
#include "soc21.h"
#include "nvd.h"
@@ -6486,3 +6487,75 @@ const struct amdgpu_ip_block_version gfx_v11_0_ip_block =
.rev = 0,
.funcs = &gfx_v11_0_ip_funcs,
};
+
+static int gfx_v11_0_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,
+ struct drm_amdgpu_userq_in *args_in,
+ struct amdgpu_usermode_queue *queue)
+{
+ struct amdgpu_device *adev = uq_mgr->adev;
+ struct amdgpu_mqd *mqd_gfx_generic = &adev->mqds[AMDGPU_HW_IP_GFX];
+ struct drm_amdgpu_userq_mqd_gfx_v11_0 mqd_user;
+ struct amdgpu_mqd_prop userq_props;
+ int r;
+
+ /* Incoming MQD parameters from userspace to be saved here */
+ memset(&mqd_user, 0, sizeof(mqd_user));
+
+ /* Structure to initialize MQD for userqueue using generic MQD init
function */
+ memset(&userq_props, 0, sizeof(userq_props));
+
+ if (args_in->mqd_size != sizeof(struct drm_amdgpu_userq_mqd_gfx_v11_0))
{
+ DRM_ERROR("MQD size mismatch\n");
+ return -EINVAL;
+ }
+
+ if (copy_from_user(&mqd_user, u64_to_user_ptr(args_in->mqd),
args_in->mqd_size)) {
+ DRM_ERROR("Failed to get user MQD\n");
+ return -EFAULT;
+ }
+
+ /* Create BO for actual Userqueue MQD now */
+ r = amdgpu_bo_create_kernel(adev, mqd_gfx_generic->mqd_size, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_GTT,
+ &queue->mqd.obj,
+ &queue->mqd.gpu_addr,
+ &queue->mqd.cpu_ptr);
+ if (r) {
+ DRM_ERROR("Failed to allocate BO for userqueue (%d)", r);
+ return -ENOMEM;
+ }
+ memset(queue->mqd.cpu_ptr, 0, mqd_gfx_generic->mqd_size);
+
+ /* Initialize the MQD BO with user given values */
+ userq_props.wptr_gpu_addr = mqd_user.wptr_va;
+ userq_props.rptr_gpu_addr = mqd_user.rptr_va;
+ userq_props.queue_size = mqd_user.queue_size;
+ userq_props.hqd_base_gpu_addr = mqd_user.queue_va;
+ userq_props.mqd_gpu_addr = queue->mqd.gpu_addr;
+ userq_props.use_doorbell = true;
+
+ r = mqd_gfx_generic->init_mqd(adev, (void *)queue->mqd.cpu_ptr,
&userq_props);
+ if (r) {
+ DRM_ERROR("Failed to initialize MQD for userqueue\n");
+ goto free_mqd;
+ }
+
+ return 0;
+
+free_mqd:
+ amdgpu_bo_free_kernel(&queue->mqd.obj, &queue->mqd.gpu_addr,
&queue->mqd.cpu_ptr);
+ return r;
+}
+
+static void
+gfx_v11_0_userq_mqd_destroy(struct amdgpu_userq_mgr *uq_mgr, struct
amdgpu_usermode_queue *queue)
+{
+ struct amdgpu_userq_obj *mqd = &queue->mqd;
+
+ amdgpu_bo_free_kernel(&mqd->obj, &mqd->gpu_addr, &mqd->cpu_ptr);
+}
+
+const struct amdgpu_userq_funcs userq_gfx_v11_funcs = {
